Fpga resumes in Pune, Maharashtra, India

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Software Engineer Data

Pune, Maharashtra, India
... Surveillance System- an FPGA based design 2. Design of a Smart Bumper System SCHOLASTIC ACHIEVEMENTS 1. Achieved a State scholarship for state rank 19th in order of merit in class four final examination. 2. Attended a science conference – DST ... - Jan 13

Verilog, FPGA design, Cadence Virtuoso, C language, Embedded C

Pune, Maharashtra, India
... Tech (Sem III & IV) : Title: Fast, Energy Efficient Approximate Multiplier Using Carry Maskable Adder and its FPGA Implementation Duration: 12 months Tool used: Xilinx ISE 14.7 Design Suite, FPGA (Spartan 3E) kit Description: Approximate ... - 2019 Dec 21

embedded Software Engineer

Pune, Maharashtra, India
... 2.Project : FPGA Based Radiation Detector Pulse Processing module (M.tech, Bhabha Atomic Research Center Mumbai) Platform: Xilinx Spartan6, Aldec(FPGA - simulation) Description: The project contains the design, development and testing of a USB based ... - 2019 Nov 22

Python Engineering

Pune, Maharashtra, India
... • FPGA implementation of a 512Mb, 200Hz DDR SDRAM Data controller. An optimized controller was designed and implemented on FPGA. Implementation has been done in Verilog HDL using Modelsim and Xilinx ISE. • Android application on museum guide using ... - 2019 Sep 20

Manager Sales

Pune, Maharashtra, India
... Hardware Designing : ASIC, VLSI, FPGA, RF, CMOS, ASP, DSP. Engineering : CATIA, UNIGRAPHICS, NASTRAN, PATRAN, ENOVIA, IDEAS, AUTOCAD, HYPERMESH, LS-DYNA, ANSYS, WINDCHILL, PRO-E, WILDFIRE, TEAMCENTER, CREO, CFD Others : LOTUS NOTES, RETEK, CRAMER, ... - 2019 Aug 11

Electrical Project

Pune, Maharashtra, India
... Participated in FPGA Based Drive Control training program. 1 Month Training of Electrical Automation in Electro Dreams Tech Participated in Theory-Cum-Practice oriented training program on Thermal Utilities. Participated in the National Convention ... - 2019 Mar 10

Hardware Design

Pune, MH, India
... Also worked on Xilinx and Altera FPGA’s and CPLD’s based designs, Power management, Signal Integrity and Multilayer board stack-up design. Current employment: Senior Project Lead, NEC (Dec 2014 – till date) Technical Expertise Experience in Design ... - 2018 Feb 12

Design High School

Pune, MH, India
... idea will helpful in specially in high speed, with less memory, and less error, because of the lifting requires less memory, as well as FPGA we all know the FPGA is high speed parallel processing, and the design is successfully implemented on FPGA. ... - 2017 Apr 01

Electronics and telecommunications

Pune, MH, India
... CAR SECURITY SYSTEM USING FPGA Keyless car entry through face detection using FPGA MATLAB, VHDL 3 2012-2013 . PERSONAL PROFILE: Name : Rohini Ramchandra Joshi Father’s Name : Ramchandra Pandharinath Joshi Sex : Female Marital Status : Married. ... - 2017 Mar 08

Design Engineering

Pune, MH, India
... editor for the IEEE Transactions on Reliability Since 2015 Engineer, Tenrehte Technologies, Inc., Rochester, NY Verilog RTL modeling and verification of blocks such as FIFO’s and programmable FSM controllers, for efficient FPGA implementation. ... - 2016 Nov 21
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