| Resume alert | Resumes 21 - 30 of 38 |
Project Design
Pune, MH, India
... Verilog,VHDL Simulation Tools ModelSim, Xilinx Isim Synthesis Tools Xilinx Synthesis Tool (XST) Design Platform Tools Cadence Virtuoso Design Suite Microcontroller 8051, AVR 8515 Microprocessor 8085, 8086, ADSP 2181 Design Kits FPGA Spartan III ... - 2015 Aug 25
... Verilog,VHDL Simulation Tools ModelSim, Xilinx Isim Synthesis Tools Xilinx Synthesis Tool (XST) Design Platform Tools Cadence Virtuoso Design Suite Microcontroller 8051, AVR 8515 Microprocessor 8085, 8086, ADSP 2181 Design Kits FPGA Spartan III ... - 2015 Aug 25
Design Assistant
Pune, MH, India
... Tools: Agilent ADS, Cadence Virtuoso, Mentor Graphics (ELDO). • SRAM with sleep transistors, power issues to be resolved. Description: Reduces the sub-threshold leakage power using the Sleep Transistors in the SRAM memory design. Tools: Cadence ... - 2015 Apr 16
... Tools: Agilent ADS, Cadence Virtuoso, Mentor Graphics (ELDO). • SRAM with sleep transistors, power issues to be resolved. Description: Reduces the sub-threshold leakage power using the Sleep Transistors in the SRAM memory design. Tools: Cadence ... - 2015 Apr 16
Design Project
Pune, MH, India
... Design of vga controller using verilog HDL(virtex 4) Custom design using cadence: Circuit design,Simulation,Layout design and testing of standard cells o Design of adder using 28,32 and 14 transistors. o Area of Interest Digital design RTL coding ... - 2015 Apr 13
... Design of vga controller using verilog HDL(virtex 4) Custom design using cadence: Circuit design,Simulation,Layout design and testing of standard cells o Design of adder using 28,32 and 14 transistors. o Area of Interest Digital design RTL coding ... - 2015 Apr 13
vlsi, electronics,communication
Pune, MH, India
... ROLE: Developer TEAM SIZE: 4 TECHNICAL SKILLS Language Skills: C, VERILOG,VHDL Software Skills: XILINX,CADENCE(Virtuoso),TANNER TOOL Areas of Interest : Communication system, Signals System,Digtal Electronics, Electronics devices And Circuits. ... - 2015 Jan 31
... ROLE: Developer TEAM SIZE: 4 TECHNICAL SKILLS Language Skills: C, VERILOG,VHDL Software Skills: XILINX,CADENCE(Virtuoso),TANNER TOOL Areas of Interest : Communication system, Signals System,Digtal Electronics, Electronics devices And Circuits. ... - 2015 Jan 31
Project Engineering
Pune, MH, India
... Boys High 2006 63.43% School, Madhubani ACADEMIC PROJECT AND PAPER PRESENTATION Project Title Design & Implementation of Low Power 3-bit Flash ADC in 180nm Technology using cadence tool. Software Used VLSI using Cadence Tool. Project Description A 3 ... - 2014 Oct 18
... Boys High 2006 63.43% School, Madhubani ACADEMIC PROJECT AND PAPER PRESENTATION Project Title Design & Implementation of Low Power 3-bit Flash ADC in 180nm Technology using cadence tool. Software Used VLSI using Cadence Tool. Project Description A 3 ... - 2014 Oct 18
C Project
Pune, MH, India
... Operating Systems : Windows XP, Windows 7, Windows 8, Linux (Ubuntu) Software worked on : Cadence, Orcad Layout 9.1, Lab view, Xilinx, Matlab. Computer basics : Basic computer knowledge, MS-CIT. Extracurricular Activities: • Participated in “N.C.C” ... - 2014 Aug 22
... Operating Systems : Windows XP, Windows 7, Windows 8, Linux (Ubuntu) Software worked on : Cadence, Orcad Layout 9.1, Lab view, Xilinx, Matlab. Computer basics : Basic computer knowledge, MS-CIT. Extracurricular Activities: • Participated in “N.C.C” ... - 2014 Aug 22
Project Engineering
Pune, MH, India
... TOOLS USED: Vivado, Precision, Synplify, Xilinx, Cadence - 2014 Jun 26
... TOOLS USED: Vivado, Precision, Synplify, Xilinx, Cadence - 2014 Jun 26
Design System
Pune, MH, India
... Attended Wireless Telecom training conducted by Nano Cell networks Attended 2 day workshop on Cadence tools conducted by Cadence at MCIS, Manipal Date of Birth: 20th Jan, 1988 Sex: Male Languages Known: English, Kannada, Telugu and Hindi - 2014 Jun 12
... Attended Wireless Telecom training conducted by Nano Cell networks Attended 2 day workshop on Cadence tools conducted by Cadence at MCIS, Manipal Date of Birth: 20th Jan, 1988 Sex: Male Languages Known: English, Kannada, Telugu and Hindi - 2014 Jun 12
M.Tech in VLSI Design
Pune, MH, India
... Department: “Pipeline ” PROGRAMMING SKILLS • Tools Known: T-SPICE v12.6, Xilinx ISE 12.1, S-edit 12.6, Cadence RTL Complier v08.10 • Languages Known : C, C++, VHDL • Application Software Known :MS Office • Environments: Windows 98/XP/7/8 • Soft ... - 2014 Jun 05
... Department: “Pipeline ” PROGRAMMING SKILLS • Tools Known: T-SPICE v12.6, Xilinx ISE 12.1, S-edit 12.6, Cadence RTL Complier v08.10 • Languages Known : C, C++, VHDL • Application Software Known :MS Office • Environments: Windows 98/XP/7/8 • Soft ... - 2014 Jun 05
Engineer Project
Pune, MH, India
... : C, C++, Hardware Description Language Assembly Language (M.C.-8051, M.P.-8086) Tools/Software : Keil Microvision 3 Xillinx Project Navigator v-19 Matlab-7 Masm Cadence Project details Title :- air pollution monitering system based on sensors. ... - 2014 May 20
... : C, C++, Hardware Description Language Assembly Language (M.C.-8051, M.P.-8086) Tools/Software : Keil Microvision 3 Xillinx Project Navigator v-19 Matlab-7 Masm Cadence Project details Title :- air pollution monitering system based on sensors. ... - 2014 May 20