| Resume alert | Resumes 11 - 20 of 38 |
Embedded,Matlab,linux
Pune, Maharashtra, India
... Mini Project:- "Monostable Multivibrator in Cadence " Tools : Cadence Virtuoso Summary: We have design schematic for Monostable Multivibrator using Cadence Virtuoso environment also prepared layout for the same using 180n technology. Delay is ... - 2018 Sep 15
... Mini Project:- "Monostable Multivibrator in Cadence " Tools : Cadence Virtuoso Summary: We have design schematic for Monostable Multivibrator using Cadence Virtuoso environment also prepared layout for the same using 180n technology. Delay is ... - 2018 Sep 15
Fresher
Pune, Maharashtra, India
... Technology node worked on was 180nm in Cadence’s Virtuoso tool 1. Digital library/ Standard cell layout design. (NOR gate, NAND gate, D Flip Flop) 2. Digital circuit layout design. (pre-driver circuit as part of general purpose I/O) 3. Analog ... - 2018 Aug 23
... Technology node worked on was 180nm in Cadence’s Virtuoso tool 1. Digital library/ Standard cell layout design. (NOR gate, NAND gate, D Flip Flop) 2. Digital circuit layout design. (pre-driver circuit as part of general purpose I/O) 3. Analog ... - 2018 Aug 23
Python Data
Pune, MH, India
... Software known Cadence Virtuoso 6.1.5, OrCAD-9.2. Microcontroller and SoC PIC16F877A, PIC18f46k22, ZigBee, Arduino, Raspberry Pi 3, LoRa, ESP8266 wifi . Software’s worked on PS-Spice, Proteus Pro, Xilinx, MATLAB, LabVIEW, MPLab X, MPLab 8.6, Pad2pad ... - 2018 May 29
... Software known Cadence Virtuoso 6.1.5, OrCAD-9.2. Microcontroller and SoC PIC16F877A, PIC18f46k22, ZigBee, Arduino, Raspberry Pi 3, LoRa, ESP8266 wifi . Software’s worked on PS-Spice, Proteus Pro, Xilinx, MATLAB, LabVIEW, MPLab X, MPLab 8.6, Pad2pad ... - 2018 May 29
microcontroller, embedded, iot, I2C, C++, UART, SPI, python, openCV
Pune, MH, India
... Microcontroller and SoC PIC 16F877A, ZigBee Pro, Arduino Software’s worked on PS-Spice, Proteus Pro, Xilinx, MATLAB, LabVIEW, Cadence Virtuoso 6.1.5, OrCAD-9.2. Certification: Sr. No. Participation Organisation / Institute Year 1. Nanoparticle ... - 2018 May 29
... Microcontroller and SoC PIC 16F877A, ZigBee Pro, Arduino Software’s worked on PS-Spice, Proteus Pro, Xilinx, MATLAB, LabVIEW, Cadence Virtuoso 6.1.5, OrCAD-9.2. Certification: Sr. No. Participation Organisation / Institute Year 1. Nanoparticle ... - 2018 May 29
Engineering Technical
Pune, MH, India
... • Tools/Platforms: Keil uVision, Matlab, Python, Xilinx ISE, Ngspice, Cadence Virtuoso, Arduino and HTML • Microcontroller: 8051, LPC2148(ARM7), STM32F411(Cortex M4) • Courses Studied: Digital Design and Verification, Image Processing and Computer ... - 2017 Dec 02
... • Tools/Platforms: Keil uVision, Matlab, Python, Xilinx ISE, Ngspice, Cadence Virtuoso, Arduino and HTML • Microcontroller: 8051, LPC2148(ARM7), STM32F411(Cortex M4) • Courses Studied: Digital Design and Verification, Image Processing and Computer ... - 2017 Dec 02
PCB Designer
Pune, MH, India
... Design Tool Experience: Mentor Graphics PADS Altium Designer Mentor Graphics Boardstation Mentor Graphics Xpedition Cadence Allegro Valor CAM 350 And currently learning Eagle to work for a client Key Technical Skills: Designed complex multilayer ... - 2017 Sep 22
... Design Tool Experience: Mentor Graphics PADS Altium Designer Mentor Graphics Boardstation Mentor Graphics Xpedition Cadence Allegro Valor CAM 350 And currently learning Eagle to work for a client Key Technical Skills: Designed complex multilayer ... - 2017 Sep 22
Project Engineer, pcb designer, orcad, testing pcb's
Pune, MH, India
... SKILLS National level certification in PCB designing using Cadence ORCAD from LIVEWIRE INDIA, PUNE. ORCAD Capture : Schematic diagram, Library creation, Component creation, Page Project, Folder Project. PSPICE : Simulation and Analysis PCB editor : ... - 2016 May 29
... SKILLS National level certification in PCB designing using Cadence ORCAD from LIVEWIRE INDIA, PUNE. ORCAD Capture : Schematic diagram, Library creation, Component creation, Page Project, Folder Project. PSPICE : Simulation and Analysis PCB editor : ... - 2016 May 29
Project Electronics
Pune, MH, India
... TECHNICAL SKILLS Programming C, TCL,VHDL and Verilog Programming Languages Simulation Tools LT spice, Xilinx ISE, Lab VIEW CAD Tools Cadence Virtuoso (6.1.4),Cadence SOC Encounter,ICC Synopsys. RF Tools HFSS,4NEC PCB Design Tools Orcad, PCB Express ... - 2016 May 05
... TECHNICAL SKILLS Programming C, TCL,VHDL and Verilog Programming Languages Simulation Tools LT spice, Xilinx ISE, Lab VIEW CAD Tools Cadence Virtuoso (6.1.4),Cadence SOC Encounter,ICC Synopsys. RF Tools HFSS,4NEC PCB Design Tools Orcad, PCB Express ... - 2016 May 05
Project Data
Pune, MH, India
... TOOLS : Cadence NCSIM LANGUAGE : System Verilog (HVL) METHODOLOGY : Constrained Random Verification 2. FLOW CONTROL MECHANISM OF PCI-EXPRESS Transaction layer is the first layer of the protocol, which interacts with Backbone/core logic. The ... - 2015 Dec 28
... TOOLS : Cadence NCSIM LANGUAGE : System Verilog (HVL) METHODOLOGY : Constrained Random Verification 2. FLOW CONTROL MECHANISM OF PCI-EXPRESS Transaction layer is the first layer of the protocol, which interacts with Backbone/core logic. The ... - 2015 Dec 28
Seeking career in VLSI domain. Good in Verilog, Cadence, FPGA
Pune, MH, India
... Tech First Year Team Size: Individual Contribution Role Played: Designer, Simulation Skills Used: Cadence Virtuoso and Spectre An Adder is designed and simulated using UMC 180nm Technology. Total 28 number of transistors used. Operational Amplifier ... - 2015 Dec 08
... Tech First Year Team Size: Individual Contribution Role Played: Designer, Simulation Skills Used: Cadence Virtuoso and Spectre An Adder is designed and simulated using UMC 180nm Technology. Total 28 number of transistors used. Operational Amplifier ... - 2015 Dec 08