| Resume alert | Resumes 1 - 5 of 5 |
Engineering Design
Aroor, Kerala, India
... 949-***-**** LANGUAGES KNOWN: English, Malayalam and Hindi EMAIL: adj4nt@r.postjobfree.com SOFTWARES KNOWN PROTEUS XILINX CADENCE LATEX Languages: c SKILLS Quick learner Strong verbal and personal communication skills Research capability Multi ... - 2021 Feb 12
... 949-***-**** LANGUAGES KNOWN: English, Malayalam and Hindi EMAIL: adj4nt@r.postjobfree.com SOFTWARES KNOWN PROTEUS XILINX CADENCE LATEX Languages: c SKILLS Quick learner Strong verbal and personal communication skills Research capability Multi ... - 2021 Feb 12
Design Engineer Engineering
Kottayam, Kerala, India
... calculation (MTBF) using Relex tool in MIL and Bellcore standards Familiar with EDA tools - Mentor Graphics and Orcad Cadence Allegro Experience in circuit simulation tools - TINA and LT Spice Working knowledge of linear and switching voltage ... - 2020 Jun 07
... calculation (MTBF) using Relex tool in MIL and Bellcore standards Familiar with EDA tools - Mentor Graphics and Orcad Cadence Allegro Experience in circuit simulation tools - TINA and LT Spice Working knowledge of linear and switching voltage ... - 2020 Jun 07
Engineering Project
Kottayam, Kerala, India
... The project was implemented using cadence virtuoso, using 65 nm technology. Technology Used : Cadence ● Efficient R-Peak Detection The project describes an efficient algorithm for R peak detec on in an ECG signal. Detec on of the R peaks in an ECG ... - 2019 Dec 18
... The project was implemented using cadence virtuoso, using 65 nm technology. Technology Used : Cadence ● Efficient R-Peak Detection The project describes an efficient algorithm for R peak detec on in an ECG signal. Detec on of the R peaks in an ECG ... - 2019 Dec 18
Information Technology Design
KL, 686001, India
... Josephs Higher Secondary School, changanacherry, Kerala State Board (2006) – 80% (Distinction) Transferable Skills Languages : VHDL, Verilog HDL, Embedded C Simulation Tools : Modelsim (10.2), Cadence Virtuoso, Cadence Nclauncher Synthesis Tools : ... - 2016 Apr 27
... Josephs Higher Secondary School, changanacherry, Kerala State Board (2006) – 80% (Distinction) Transferable Skills Languages : VHDL, Verilog HDL, Embedded C Simulation Tools : Modelsim (10.2), Cadence Virtuoso, Cadence Nclauncher Synthesis Tools : ... - 2016 Apr 27
analog design,digital design,asic design
Kottayam, KL, 686562, India
... TECHNICAL ACHIEVMENTS EDA TOOLS Schematic Design: Mentor Graphics Design Architect,Cadence virtuoso schematic editor. Simulation: Mentor Graphics ModelSim, Mentor Graphics Eldo Simulator,SPICE, IOSIM. Synthesis: Cadence RTL Compiler, Xilinx ISE. ... - 2012 Jul 17
... TECHNICAL ACHIEVMENTS EDA TOOLS Schematic Design: Mentor Graphics Design Architect,Cadence virtuoso schematic editor. Simulation: Mentor Graphics ModelSim, Mentor Graphics Eldo Simulator,SPICE, IOSIM. Synthesis: Cadence RTL Compiler, Xilinx ISE. ... - 2012 Jul 17