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vlsi design engg.
Gaya, BR, India
... 82.60 % SKILLS: Programming : Verilog HDL Software : ALTERA Quartus II 9.1, MODELSIM (Quartus II 9.1) Cadence Virtuoso Schematic Editor, RC compiler, Cadence Encounter. Operating system : Linux, Windows. PROJECTS: Design of Low Power BIST for Scan ... - 2012 Aug 09
... 82.60 % SKILLS: Programming : Verilog HDL Software : ALTERA Quartus II 9.1, MODELSIM (Quartus II 9.1) Cadence Virtuoso Schematic Editor, RC compiler, Cadence Encounter. Operating system : Linux, Windows. PROJECTS: Design of Low Power BIST for Scan ... - 2012 Aug 09