verilog resumes 9

Engineer High School

United Arab Emirates
... WORK EXPERIENCE : > Worked as VLSI system design Verilog HDL programmer trainee engineer in SILICON TECHNO SOLUTIONS from 01/01/2013 to 31/3/2014 ACHIVEMENTS: > Topped at school level > Presented a project at A TWO DAY NATIONAL CONFERENCE ADVANCED ... - Jun 25

Design Pvt Ltd

India, Bangalore, KA
... Summary of Qualifications Good understanding of the ASIC and FPGA design flow Experience in writing RTL models in Verilog HDL and Test benches in SystemVerilog Very good knowledge in verification methodologies(UVM) Experience in using industry ... - Jun 25

Agile Product Manager

Mountain View, CA
... Interfaced Xilinx Spartan IIE FPGA with LSI Logic SC2005 Mpeg decoder using Verilog HDL Codes 3. Worked on ucos -II RTOS on the mpeg decoder for UART connectivity. 4. Developed a serial RS232 interface to transmit and monitor raw pixel data using ... - Jun 25

Power simulator,matlab,autocad

India, Puducherry, PY
... TECHNICAL SKILLS Software skills- MATLAB,Power World Simulator,Verilog/VHDL, C/C++, AutoCAD, Keil. Area of Interest-Power Electronics, Power System Protection, Electrical Machines and Digital Electronics. Special interest towards Robotics, ... - Jun 25

High School Project

... LANGUAGES: C, VERILOG and VHDL. PROJECT: Mini Project: Automated vehicle for physically and visually handicapped. Major Project: VHDL implementation of DIGITAL GPS RECEIVER. Description: In this project a digital GPS signal receiver for a system on ... - Jun 25

Project Engineer

United Arab Emirates, Dubai, DU
... Responsibilities : Verilog Coding using Quartus Tool, Schematic level Review, Digital Design. Worked as project trainee at MS. Ramaiah School of Advanced Studies, Bangalore from September 2011 to July 2012.As a Design intern created a IP design for ... - Jun 25

Project Engineer

... Languages: 'C', C++, VHDL, VERILOG, Network analysis. . Tools: Matlab, Xilinx, Model SIM, P-SPICE, H-SPICE, LT-SPICE . Strong basics in core subjects Strengths . Adaptability . Self-learning attitude . Positive thinking . Accepting feedback and ... - Jun 25

VLSI chip designing, embedded systems.

India, Hyderabad, Telangana
... • Programming Languages : VERILOG, VHDL,C. WORKED UPON Design tools : VIRTUOSO Software : ISE 13.1, CADENCE ( ANALOG AND DIGITAL) FPGA : SPARTAN 3E • Interesting Subjects : Digital Electronics, Electronics Devices Circuits, Embedded, VLSI, FPGA etc ... - Jun 25

VLSI design, VHDL & Verilog Programming

India, Bangalore, KA
... S.MARTIAL BENEDICT REGIS Mobile: 989******* OBJECTIVE To be an integral part of a dynamic organisation where my knowledge and technical skills can contribute to mutual growth TECHNICAL SKILL SET C, VHDL, Verilog HDL ... - Jun 25

Project Engineer

... Demonstrated expertise in Verilog HDL and front-end & Back -End Cadence based ASIC flow. Skills Summary Verilog. C language Good at Digital Concepts. Linux Basics Capabilit y of handling Synthesis & STA act ivit ies. Basic knowledge in DFT. Clear ... - Jun 25

Hardware Design Engineer

India, Chennai, TN
... ACADEMIC ACHIEVEMENT Published Paper entitled “ Development of Basic Template Environment for Functional Verification of VLSI Design in UVM” in IJETAE international journal TECHNICAL SKILL Programming language : Verilog, System Verilog, C++ ... - Jun 25

Design Engineering

Chandler, AZ
... COMPUTER SKILLS: ● High level language : C, C++, Java, System Verilog, Perl, Tcl ● Design/Layout/Testing tools : Cadence, MATLAB, Nanohub, Synopsys Design Vision, Encounter and VCS ACADEMIC PROJECTS: DIGITAL MOS IC: ● Designed a 4*4 SRAM memory cell ... - Jun 25


... known: VHDL and Verilog Software languages known: C and C++ PERSONAL DETAILS DOB: 12-11-1992 Father’s Name: Vijaykumar. B. Munnolli Languages known: English, Kannada, Hindi I, hereby declare that the above information is true to its fullest. - Jun 24

Looking for an entry level job in VLSI/Embedded related Core concern

India, TN
... Testing of VLSI Circuits Skill set: Programming Languages : Verilog HDL, C, C++, System Verilog, Java Software Packages : Xilinx ISE, QuestaSim 6.5c, ModelSim, MATLAB EDA Tools : Tanner EDA, PSPICE. Hardware’s Used : FPGA SPARTAN 3 Projects ... - Jun 24

Project Engineer

... Tools Xylinx ife, Altera Quartus 2, Modelsim 10.1c, Kiel c 6,Synopsis Vsim, Orcad 8, Leonardo spectrum Languages proficiency Verilog,VHDL, System Verilog (Excellent) International Design and Characterisation of RS485 Communication publication and ... - Jun 24

Project High School

India, Bangalore, KA
... I n terest Skill Sets Languages C, Verilog, Basics of System Verilog. Tools Mat lab, ModelSim, CADENCE (Virtuoso, NCSim). Operating System Windows 7, XP, vista, Linux. Technical Activities 1 PROJECT 1: M .Tech 1 year project - B uilding Verification ... - Jun 24

Engineer Design

Austin, TX
... Writing Verification Environment from scratch using Verilog, SystemVerilog. Verification methodology like OVM,UVM Defining and implementing test plans, coverage plans Defining testplan for production testvector generation & developing production ... - Jun 24

Design System

India, Chandigarh, CH
... Summary of Qualifications > Good understanding of the ASIC and FPGA design flow > Experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog > Very good knowledge in verification methodologies > Experience in using industry ... - Jun 23

verification engineer in vlsi

Hong Kong
... Languages: Verilog,System Verilog,Core Java/J2EE, C, C++, PERL,HTML . Database: SQL(Oracle 10G) . Tools: Eclipse,Xilinx,Quartus,BSPICE, HSPICE, Magic, EMANAGER, Simvision, . Methodology: UVM Methodology . Bus protocols: AMBA-AXI, PCI, ST Imaging Bus ... - Jun 23

Design Engineer

United States
... TECHNICAL SKILLS • Programming/ Scripting languages - C, C++, Java, Verilog, System Verilog, SystemC, Python. • Tools/ Protocols - Cadence Virtuoso, Hspice, Modelsim, Synopsys Design Vision, Sterling Distributed Order Management. PROFESSIONAL ... - Jun 23
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