verilog resumes 9
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Engineer Developer

Houston, TX
... , clearcase DCO: CFEngine, Puppet, mco, VM, Nagios, RabbitMQ, provisioning/monitoring ITS: FogBugz, Bugzilla, Jira, RT, Remedy EDA: Verilog, Abel, OrCad Other: System architecture, embedded systems, Linux kernel, GNU/FSF, Custom Perl modules, System ... - Jun 22

Project Engineering

India
... of MS Junior College 2008 92.4 e Intermediate Education, AP B.E OU Muffakham Jah 2012 79.7 (EEE) College Of Engineering and Technology M.Tech VNR VJIET VNR VJIET 2014 77.6 (VLSI) TECHNICAL SKILLS > Programming Languages : Verilog HDL, Matlab, C. ... - Jun 22

High School Engineer

India
... Good knowledge of verilog,sv, uvm, & telecommunication etc. Technical Skills: Programing language:- c, c++ & ladder program Project Experience: Project Name Uart Organization Iivdt bangalore Description I have worked on Timetable,Academic management ... - Jun 22

Engineer Quality Control

Orlando, FL
... 2012, Spring 2014 GPA in Major - 3.4/4.0 Valencia Community College Orlando, FL Associate of Arts General Studies, August 2010 Efficient in multiple programs, including: Microsoft Office, LINUX, MATLAB, Verilog, VHDL, C, C# and Assembly Languages. ... - Jun 21

Project Pvt Ltd

India
... College of engineering and technology DURATION : February 2014 to till date TOOLS USED : Xilinx ISE Design Suite 13.2 LANGUAGE : Verilog HDL Configuration Board : Virtex 5(XUPV5-LX110T) DESCRIPTION : Multiplication is one of the most area consuming ... - Jun 21

vlsi

India, Mumbai, MH
... the company as well as myself with the result To ensure my highest contribution towards the organization I work with Key skills: Programming Languages : C language & Ds Hardware Description Languages : VHDL, Verilog HDL, Basics of system Verilog. ... - Jun 21

Engineering Design

India, Vellore, TN
... Descriptive Language :- Verilog HDL Scripting Languages :- PERL,TCL Simulators and EDA Tools :- Cadence Vir tuoso,Cadence RTL Compiler,Cadence ncsim,Cadence Encounter, ALTERA ModelSim 6.5b, A LTERA Quatrus ii 9.1sp2, Keil (89C51), Proteus. Assembly ... - Jun 21

Computer Engineer/Data analyst

Miami, FL
... Programming Languages: C/C++, C#, Assembly, HTML, Verilog, and MS SQL. Knowledge of PL/SQL Professional Experience Graduate Assistant, Office of Planning and Institutional Research July 2013 – Present Florida International University, Miami, Florida ... - Jun 20

Electrical Technician

Algonquin, IL
... Motor Control System Freescale SCM Automatic Identification Smart Car Competition COMPUTER SKILLS Languages: C/C++, JAVA, Verilog HDL, MATLAB Software: Microsoft Office, Altium Designer, MATLAB/SIMULINK Web page design: Dreamweaver, HTML5 EXPERIENCE ... - Jun 20

Fresher in electronics and communication Engineering

India, Pune, MH
... Skill Sets Languages : C++, ALP, VHDL/ Verilog, Matlab Operating System : Windows 7, Windows XP, Windows 8 Technical Activities Attended the pre-placement training organized by department of placement and training at SMVITM Bantakal. Attended the ... - Jun 20

Project Training

India
... Verification language : System Verilog . Software programming language : C,C++,JAVA . Tools used : Xilinx, Flower arrangement (stood 1) Badminton (stood 2) Anchor in event k . Self -Esteemed . Stress taking ability . Parents & Family Fathers Name : ... - Jun 20

Engineer Project

India, New Delhi, DL
... • C, MATLAB, Keil µ version, Verilog, System Verilog • Synopsis Galaxy series Synthesis and physical design tools – DC-Compiler, C-Designer, IC- Compiler(90nm lib), Gate level simulation – GLS (90nm lib) • Xilinx, HSPICE, Minimos HARDWARE TOOLS AND ... - Jun 20

Engineering Design

Dayton, OH
... • Programming Languages: C/C++ STL, Matlab, VHDL, Verilog, LaTeX. • Experience with VLSI circuit design, RTL simulation, circuit design optimization • Ability to perform transistor level modeling of digital and analog circuits. • Experience with ... - Jun 19

ASIC Design and Verification,Cadence proficiency

India, Vellore, TN
... Verilog code for PID architecture has been written and Cadence-RC tool used for synthesis. ASIC implementation has been done with Cadence-Encounter. Results have been drawn by comparing the proposed architecture with traditional architecture in ... - Jun 19

Project Training

India, Jammu, JK
... M.TECH: MINI PROJECT ON • Implementation of vending machine using verilog HDL • Implementation of 4*4 bit combinational multiplier PERSONAL INFORMATION Father’s Name : Sundar Raj H.S. Mother’s Name : Pushpa H.S. : 4th Jul 1991 Date of Birth Hobbies ... - Jun 19

Engineering Project

India, Thiruvananthapuram, KL
... SKILLS HDL : VHDL,Verilog VLSI CAD Tools : GHDL, Xilinx ISE, SPICE Microcontrollers and Programming Languages :8051, 8085, PIC, ARM, C, QT-Octave and MATLAB Programming Other tools : gcc, arm-linux-gcc,Crosstool, Buildroot, Ptxdist Familiar ... - Jun 19

Assistant Power

India, Ahmedabad, GJ
... Andhra Pradesh 2005-06 77.66% S.S.C SKILLS Areas of Interest Low Power Processor Design, STA Programming Languages Verilog HDL, TCL, C Tools and Cadence Encounter RC, Virtuoso, Active HDL, LT-Spice, Xilinx Technologies Technical Electives Low ... - Jun 18

vlsi engineer

India, Nagpur, MH
... Programming Languages: C, C++,VHDL,Verilog. 3. Tools: ISE, Matlab, LABVIEW, SIMULINK 4. Software Packages: MS Office. 5. Hardware implementation: Autonomous Robot using Microcontroller & Sensors, FPGA Implementation of Fractal Image Compression ... - Jun 18

VLSI & Embedded Systems,RTL Coding- Verilog, SV,Digital Design

India, Pune, MH
... College, Agra TECHNICAL SKILLS Software Packages : MATLAB, LabVIEW, Xilinx, OpenCV Computer Languages : C, C++, RTL Coding - Verilog, System Verilog Operating Systems : Windows XP/Vista/7, Linux(Ubuntu) Subjects learned : Digital Design, ASIC, ... - Jun 18

VLSI DESIGN Engineer

India
... Languages : Basics of VHDL/Verilog HDL. : MATLAB Co-Curricular activity Attended a two day national seminar on “Research Applications using MATLAB” conducted at Kongu engineering college, Perundurai. Presented a Paper In “IEEE International ... - Jun 18
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