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Engineer Design

Morristown, NJ map
... Learning tool: Verilog, System Verilog Projects at NJIT: - . Implement a parallel algorithm in VHDL for "Object recognition in image" proposed in IEEE. Use TSMC 0.18 micron technology. Successfully done pre and post synthesis simulations. Created a ... - Dec 21

Design Engineer Engineering

India, Bengaluru, Karnataka map
... Knowledge of VHDL, Verilog, MATLAB, Digital Signal Processing, System and Circuit level designs, Layout diagrams. Technical Skills Worked in Quartus II, Cadence, ModelSim ( Beginner) EDUCATIONAL CREDENTIALS B.E Electronics and Communication ... - Dec 21

System Data

India, Kolkata, West Bengal map
... Languages : C, Embedded C, Verilog HDL . Operating Systems : Windows XP/7, Linux . Development Tools : MATLAB (Simulink, Guide), Xlinx ISE 13.2, MVC++ 6.0, Keil uVision4 . Testing Tools : Various in House (PATS, PASIT), Modelsim 6.3f. . Standards/ ... - Dec 21

vlsi designer

India map
... S.S.C Z.P.P high school Kotapalle, Board of 68.8% 2008 Secondary Piler Education Technical skills: Operating Systems : Windows 7,8, 8.1,Ubuntu 14.10 Languages : Basics in C, Verilog HDL,VHDL,MATLAB, Xilinx ISE, P-spice. : MS Office 2013, Open Office ... - Dec 21

Electrical Engineer Engineering

United States map
... = 8.83/10 Overall CPI (Cumulative Performance Index) = 8.06/10 SKILLS • Applications : MATLAB, COMSOL Multiphysics,LATEX, XILINX, Verilog, Advanced Design System(ADS), MULTISIM,MS Word, MS Excel, MS Power Point,VLSI • Programming in C, SQL, Python • ... - Dec 20

Project Training

India, Namakkal, Tamil Nadu map
... Verilog. ii. Quaterus-II ii. VHDL 3) Simulation Tools i. Modelsim. ii. Questasim COCURRICULAR ACTIVITIES: . Won SECOND prize in National level symposium conducted in Sengunthar college of engineering on the topic of " Bluetooth". . Won FIRST Prize ... - Dec 20

Design System

India, New Delhi, Delhi map
... & Communication) (CALICUT UNIVERSITY) 2008-2012 67.8% HSC (XII) K.S.E.B 2008 91% SSLC (X) K.S.E.B 2006 93% Technical Skill Summary Languages: C, C++, Verilog HDL, VHDL • • Circuit Simulators: Cadence Tools (Spectre, AMS, Encounter RTL compiler), LT ... - Dec 20

Diploma Quality

India, Kozhikode, Kerala map
... KNOWLEDGE PREVIEW • C,VHDL,VERILOG, ASEMBLEY– Language • XILINX,KEIL,CADENCE,MODELSIM EDUCATION COURSE Name of institute University Year CGPA /board PGD VLSI & NIELIT NIELIT 2015 PURSUING EMBEDDED HARDWARE DESIGN BE IN GANDHINAGAR GTU 2014 6.59 ... - Dec 19

Design Engineer

India, Pune, Maharashtra map
... > Experience in writing RTL models in Verilog, VHDL and Test benches in System Verilog. > Good knowledge in verification methodologies. > Experience in using industry standard EDA tools for the front-end design and verification. VLSI Domain Skills: ... - Dec 19

Engineer Design

Corona, CA map
... Arduino Development Languages: C, C++, C#, Verilog, VHDL, Python scripting, Testing Baseband Testing, Validation with low, System Verilog, Modelsim Simulation. Familiarity with OVM and UVM verification methodology. Experience with DO-254/ DOORS ... - Dec 18
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