verilog resumes 9
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VLSI Design Engineer

India, Bengaluru, KA
... Programming Languages : Verilog, VHDL, C, C++, Embedded C, Linux, and Basic Shell Scripting, PERL. FPGA Boards : Xilinx FPGA Spartan 3E, Virtex 5, Altera Cyclone II. Familiar Protocols : UART, I2C, SPI, CAN, AMBA APB, AMBA AHB, AMBA ASB. Familiar OS ... - Oct 21

Project Engineer

India, Bengaluru, KA
... > Good Skills in writing Verilog and C Programming and Testbenches. > Digital Design and CMOS Design. > Analog and Digital Design using CADENCE tool,Xilinx,ModelSim,Questasim. > ASIC -Physical Design. > Proper Knowledge in CMOS technology and Chip ... - Oct 21

VLSI (Digital)

India, Bengaluru, KA
... Programming language : Verilog. Realized basic combinational and sequential circuits as a part of the curriculum in Verilog using cadence tool. Realized single and dual port SRAM in Verilog. Realized AMBA APB protocol by ARM, which is an on -chip ... - Oct 20

M.Tech In V.L.S.I. From Iiit, Gwalior

India, Noida, UP
... Design with specialization in Front end Design Organization: Tevatron Technologies, Noida Duration: 1st September 2014 -Present TECHNICAL SKILLS Programming Languages: Hardware Description Language: Verilog Hardware Verification Language: System ... - Oct 20

M.Tech in VLSI and have 6 months experiance in layout design

India, Bengaluru, KA
... • Basic knowledge in Verilog. • Good working knowledge of Linux/Unix. Education : Institute Year of Degree Discipline Aggregate University Passing PG VLSI RV-VLSI Design Center 2014 Pursuing Diploma Sree Vidyanikethan Engineering Electronics & ME/M ... - Oct 20

vlsi design

India, Yercaud, TN
... V Microprocessor and microcontroller SOFTWARE SKILLS:- V Completed course XML.NET,ASP.NET&VB.NET at NIIT V C & C++,VHDL & Verilog V Keil "C"- Embedded C Programming V Basics of LAB VIEW & PLC V Basics of MATLAB HARDWARE SKILLS:- V Computer Hardware ... - Oct 19

Project Engineering

India, Chennai, TN
... • Good knowledge of Verilog RTL coding. • Good knowledge of Digital Design Concepts. • Good knowledge of Analog Design. • Education Examination University/School Year Class Obtained Percentage M.Tech in VLSI R.V. College of Pursuing First class 67% ... - Oct 19

Electrical Engineer Engineering

Klamath Falls, OR
... Relevant Courses: C ircuits I, I I, and I I I, Electronics I, I I, and I I I, Digital Logic, Signals & Systems, DSP, Control System Design, Verilog (VHDL), Solid State T heory, CMOS Design, Electricity and Magnetism, M icroprocessors I and I I, Data ... - Oct 18

Engineer Electrical

India, Bhopal, MP
... Skills and Abilities: Programming languages: Proficient in C, Java, PLC, Assembly Language, Verilog. I have working experience on Software Packages: MATLAB, Pspice, Cadence, Xilinx, MS OFFICE. I have basic understanding about LABVIEW and its ... - Oct 18

Project Engineering

India, Pune, MH
... TECHNICAL SKILLS * C, C++,OS, MICROCONTROLLER, VHDL & VERILOG, MATLAB, VLSI, ALP,CCNA. * Technical Paper Presentation on MAGNETIC RAM. SOFT SKILLS * Tentative, Leadership, Strong, Willpower, Motivation, Punctuality. * Willing to Relocate any where ... - Oct 18

Design Engineering

... • Experience in writing RTL models in Verilog HDL and familiar with System Verilog and UVM. • Knowledge of Digital electronics and CMOS fundamentals. ACADEMIC QUALIFICATIONS: DEGREE/ EXAMINATION UNIVERSITY/BOARD YEAR OF PASSING MARKS B. Tech ... - Oct 18

VLSI Engineer

... AREAS OF INTERESTS Networks Low power VLSI VLSI Testing CMOS RF IC Design ] SOFTWARE SKILL SET Languages : C,C++,Verilog HDL,system verilog Platforms : Windows, UNIX Packages : MS Office,Cadence-Virtuoso,NC launch,RC,Encounter Synopsys-VCS,Formality ... - Oct 18

Customer Service Electrical Engineering

Morton Grove, IL
... Digital Systems Design Filter Synthesis SKILLS Simulation: Silvaco, LT Spice, MatheMatica, MatLab Language: C, Java, Verilog Computer: Familiar with Microsoft Word, Excel, Power Point, Adobe Photoshop PROJECTS Built EMF DETECTRO (final project) ... - Oct 17

Project Engineering

... of Qualifications > Good understanding of the ASIC and FPGA design flow > Extensive experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog and UVM > Very good knowledge in verification methodologies > Experience in using ... - Oct 17

Project Information Technology

India, Hyderabad, Telangana
... Govt.Polytechnic,Mahabub 2010 State Board 66 Diploma in ECE nagar of Technical Education and Training Dayananda Vidya Board of 91 SSC Mandir,Gadwal 2007 Secondary Education SKILL SET: > Languages known : Basics of C, HTML, SQL,VHDL and Verilog > ... - Oct 17

c,c++, verilog,system verilog, assertion based vification

India, Bengaluru, KA
... 2013-2014: Identification and Implementation of AXI Assertions (Coded in System Verilog Assertions) using Questa Sim at Graphene Semiconductors services Pvt Ltd, Bangalore. . 2013: Implementation of Iterative Composite Encryption Algorithm based on ... - Oct 17

Engineering Tech

India, Bengaluru, KA
... Skills & Expertise L anguages : C, VERILOG, J AVA (Bas ic), O perating system : WINDOWS T ools : TA NNER EDA, CADENCE EDA, XILINX, Data Base : MS Office Personal Information Gender : Male Nationality : Indian Date of Birth : 31/08/1990 Hobbies : ... - Oct 16

Project Engineering

India, New Delhi, DL
... known : XILINX12.1,MATLAB CADENCE, PSPICE Languages : Basics of C,HDL, VHDL,ASIC design SOC verification using system verilog ACHIEVEMENTS Participated in 4th National Level Science Olympiad and received certificate of successful participation. ... - Oct 16

Design Engineer

... OVERVIEW Good understanding in Digital logic design & Electronics fundamentals • Good understanding of the ASIC/FPGA design flow • Experience in Verilog HDL to write synthesizable RTL, self-checking test benches& • Test benches in system Verilog ... - Oct 16

Project Java

United States
... processor architectures and used Cadence SOC Encounter tools • Performed High-level DSP algorithm simulation and code (Verilog) generation by aid of AutoESL HONORS & ACTIVITIES • Received an award of excellent graduate of the Dalian University of ... - Oct 16
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