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Engineer Design

India, Karnataka
... Technical Skills H/W Description Languages: VHDL, Verilog, System Verilog and System Verilog Assertions Other Languages : Matlab Simulator: Modelsim, from Mentor Graphics and Isim, Vivado Simulator from Xilinx Tools Used : Xilinx ISE, Vivado, ... - May 30

Project Engineering

India, Chennai, Tamil Nadu
... Online courses on System Verilog, UVM, VMM and Python. AREAS OF INTEREST: FPGA and ASIC Programming, Design and Verification. Analog Circuit and IC Design in Linux Platform. Digital System Design, Electronic Design Automation and learning a new ... - May 30

Engineering

India, Chennai, Tamil Nadu
... Percentage: 93% April 2010 TECHNICAL SKILLS: DESIGN TOOLS: PSPICE, Verilog HDL, Xilings. COMPUTER SKILLS: C and C++ languages MS office AREA OF INTEREST: Coding Testing PROJECT: Title: Automation And Authentication Of Software System In Substation ... - May 30

Project Power

India, Machilipatnam, Andhra Pradesh
... Key Skills: C, TCL, Verilog, VHDL, ASIC, Physical Design, Floor Planning, Power Planning, CTS, DRC, STA, LVS. Cadence Tools : 1. SOC Encounter - for Place and Route 2. ETS - for Static Timing Analysis 3. RTL Compiler - for Logic Synthesis 4. ... - May 30

Customer Service Driver

San Francisco, CA
... Software Tools/Libraries/Frameworks: GCC, High Performance Embedded Workshop (HEW) IDE, GEM5, Texas Instruments Code Composer Studio, QEMU ARM emulator, GNU debugger, Arduino IDE, Keil µVision 4, Eclipse, MPLAB, ModelSim, Microwind, Verilog, Vivado, ... - May 29

High School Engineer

India, Mumbai, Maharashtra
... Augustines High School, Nerul 2007 85.23% TECHNICAL SKILLS: Languages: Basics of C, C++, Matlab, Verilog Operating system: MS-DOS, Windows 98, 2000, XP, 7, Vista Application Software: Microsoft office package, Internet Explorer WORKING EXPERIENCE: ... - May 29

High School Technical

India, Bengaluru, Karnataka
... Tools : Mat lab, VHDL, Verilog. HOBBIES Listening songs. Reading books. Playing chess Strengths: Hardworking Positive thinking confidence PERSONAL PROFILE Name : T.SIVA SANKARA VARA PRASAD Father Name : T.SANKARAIAH Date of Birth : 21/05/1995 ... - May 29

Electrical Engineer Project Manager

Qatar, Doha, Doha
... SOFTWARE TECHNICAL ENVIRONMENTS Languages : Basics of C and C++, Verilog HDL, Matlab Designing software : ORCAD PSPICE Package known/OS : MS Office/Windows XP, VISTA, 7,8 AREA OF INTEREST Electronic/Electrical Engineering BMS Engineering/Industrial ... - May 28

Design Project

Pasadena, CA
... Programming in C and C++ languages, HDL and Verilog languages. Strong analytical, problem solving skills. EDA Tools: Cadence Virtuoso® Schematic Editor L Editing, Virtuoso® Analog Design Environment L Editing. Virtuoso® Assura RC, Virtuoso® Assura ... - May 28

Design Project

Pasadena, CA
... Programming in C and C++ languages, HDL and Verilog languages. Strong analytical, problem solving skills. EDA Tools: Cadence Virtuoso® Schematic Editor L Editing, Virtuoso® Analog Design Environment L Editing. Virtuoso® Assura RC, Virtuoso® Assura ... - May 28
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