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Physical Design Intern

San Jose, CA
... IMPLEMENTATION & VERIFICATION OF DDR3 DRAM CONTROLLER USING VERILOG Oct 2015 This project is aimed at designing an arbiter for DDR3 DRAM using Verilog programming language. Heavily optimized with burst chop 4(BC4) read command, write and refresh ... - Aug 29

Design Electrical Engineering

Raleigh, NC
... EDUCATION: North Carolina State University, Raleigh GPA : 3.4 Masters in Electrical Engineering May 2016 University of Pune GPA : 3.78 Bachelors in Electrical Engineering May 2014 TECHNICAL SKILLS: Languages : Verilog, System Verilog, VHDL, C++, ... - Aug 29

Electrical Engineer Engineering

Rancho Santa Margarita, CA
... components using Visual Basic and TCL Worked with Xilinx FPGA tools (Vivado) to implement digital audio receiver/transmitter with Verilog Utilized hardware diagnostic tools to troubleshoot and repair malfunctions within an electronics lab Ran audio ... - Aug 29

Design Electrical Engineering

Houston, TX
... Programming Languages: C, C++ Scripting Languages: Perl (beginner), shell, Tcl Hardware Description Languages: System Verilog, VHDL Verification Methodology: OVM, UVM Design and Simulation tools: Hspice, Synopsys TCAD, Matlab, Xilinx ISE, Cadence ... - Aug 29


India, Bengaluru, Karnataka
... ACADEMIC PROJECT: Title : Design of a DA-Based Reconfigurable FIR Digital Filter Using Verilog HDL. Domain : Very High Speed Large Scale Integration. Platform : Verilog Hardware Description Language. Description: The project presents Efficient ... - Aug 28

Electrical engineer, VLSI, verilog, RTL, testing, hardware

United States
... Circuit Design Analysis, Embedded System Design, Soldering Python, Embedded C, AVR Assembly, C/ C++, SystemC, System Verilog ORCAD Capture, Cadence, AVR Studio, IAR Embedded Workbench, Visual Studio, ModelSim, MS office Oscilloscope, Waveform ... - Aug 27

cyber security analyst, JavaScript coach and youth researcher

Canada, Mississauga, Ontario
... of Python, Scrapy and JSoup o Familiar with J2EE Programming and Eclipse IDE Coding Achievements o Basic Knowledge in MIPS, Verilog and Eiffel Studio o Cryptography and Cryptanalytic Programming in JAVA o Programmed AES, DES, DiffieHellman, and 3DES ... - Aug 26

Electronics, semiconuctors, MS office

Thousand Oaks, CA
... May 2014 Related Coursework: VLSI: CMOS Logic, Circuit simulation, Semiconductor Fabrication Processes, Layout design rules, Verilog/VHDL programming, Cadence Tool, RTL design flow, Combinational and Sequential circuit design. Linear Integrated ... - Aug 26

Engineer Project

Santa Ana, CA
... Project Name: MIPS Processor Design Project 32 Bits Developed a Modified MIPS Processor using Xilinx ISE and coding done in Verilog language. Successfully implemented 32 bit modified MIPS. Work involved Functional Verification of blocks in IP and ... - Aug 24

ASIC Physical Design Engineer

Santa Clara, CA
... : Verilog HDL, Perl, C, System Verilog, C++ Tools : Synopsys Design Compiler, Vivado, Leonardo Spectrum, H-spice, Encounter, Prime time, Eldo, Matlab, Synopsys Formality, Mentor Graphics IC studio, Mentor Graphics Pyxis, Mentor Graphics Calibre. ... - Aug 24
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