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All Skills

High School Project Ms Office College Engineering

India
... Technical Skills: Languages : Programming in C, Mat lab, Vhdl, Verilog. EDA Tool : Cadence Skills : MS office 2007/2010, Latex. Operating System : Windows XP/07/08/Vista. Key Skills: Adaptive, Determined, and Honest. Good interpersonal skills. ... - Apr 01

Project Design Signal Processing System Engineering

India, Bangalore, KA
... Proficient in writing RTL Code using Verilog and VHDL. . Familiar with VHDL, Verilog Programming. . Very good at designing CMOS Analog and Digital Integrated Circuits. . Extensive knowledge of the design concepts and applications of analog and Very ... - Apr 01

Higher Secondary Design Project Vlsi School Career Objective

India, Mumbai, MH
... > C,C++,VHDL-AMS,verilog,systemverilog. HARDWARE EXPOSURE > VLSI DESIGN > EMBEDDED PERSONAL PROFILE Father's name : Anandaraj.S Date of Birth : 04-11-1988 Sex : Male Nationality : Indian Mother Tongue : Tamil Languages Known : Tamil, English. ... - Apr 01

Assistant Design Project Summer Training Engineering

India, New Delhi, DL
... Programming Languages: VHDL, RTL Design with Verilog, System Verilog, FPGA Prototyping • Scripting languages: Perl, Shell, Python, Linux and MYSQL CORE COMPETENCIES • Digital VLSI Design • EDA Tool Design • Physical Design ACADMIC BACKGROUND • M. ... - Apr 01

Mtech Vlsi freshers

India, New Okhla Industrial Development Area, UP
... Good knowledge of Hardware Description Languages: like VHDL, and Verilog and Knowledge of System Verilog. Software Description Languages: C/C++. . Competent with good command on C/C++. . Basic knowledge of System Verilog. . Tools: Comfortable with ... - Apr 01

Project Engineering College Curriculum Vitae Design

India, KL
... Operating Systems : Windows 8/7/XP, Fedora Database : MS Excel, MS PowerPoint, MS Word Languages : C, C++, VHDL, Verilog Engineering Software : Cadence, Xilinx ISE, Orcad, Matlab Personal Profile Sex: Male Good inter personal and team skills Good ... - Apr 01

vhdl,verilog,system verilog,shall,perl scripting

India
... Verilog. System Verilog. UVM and OVM methodologies. Technical skills: Very good knowledge in Verilog Good in System Verilog design and verification Very good knowledge in digital electronics Good in object oriented programmer Good in UVM and OVM ... - Apr 01

Electrical Engineering Engineer Design Project

San Jose, CA
... India July 2010 Bachelors of Engineering, Electrical & Electronics GPA: 3.5 TECHNICAL SKILLS: Tools : RTL coding using Verilog (Xilinx ISE, Modelsim), Design Compiler (Synthesis), Cadence tools ( Virtuoso, Schematic, DRC- LVS,Formal Verification ... - Mar 31

Electrical Engineer Quality System Control Design

Canada, Toronto, ON
... Programming Languages: VHDL, Verilog, C, C++, MIPS, Assembly language. Operating Systems: Windows 7, Windows Vista, Windows XP, Windows Server 2003, Linux. WORK EXPERIENCE: Mahindra & Mahindra Ltd. - Mohali, India May, 2008 - Jan, 2012 Job Title: ... - Mar 31

Design Engineer Electrical Management System Project

Canada, Toronto, ON
... After internal testing of the reference code, Verilog modules were written and verified on the FPGA to match the reference code to the bit. . Testing was done offsite on emulated boards. Test results were generated for entire testing period. ... - Mar 31

Design Project Experience System Digital Vlsi

India, Bangalore, KA
... AREAS OF KNOWLEDGE • Good understanding of the ASIC and FPGA design f low • Experience in writing RTL models in Verilog HDL and Test benches in SystemVerilog • Very good knowledge in verification methodologies • Experience in using industry standard ... - Mar 31

Design Experience Engineering College System Project

India
... o Experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog HVL. o Experience in using functional and code coverage for measuring the quality of the Testbench. o Knowledge in writing simple Perl scripts. o Experience in using ... - Mar 31

Electrical Engineering Design College Technology

India, Vellore, TN
... Square root implementation on FPGA Sep '12 - Nov '12 Verilog implementation of nonrestoring square root algorithm using Verilog HDL coding on FPGA Tools Used: Quartus II, ModelSim . Design of triangular patch antenna in multilayered media. February ... - Mar 31

Sql Server Project Ms Office Experience Curriculum Vitae

India, Chandra, WB
... SKILL SET: 2Database Technologies : MS SQL Server 2005 3Languages : Verilog HDL, C, C++. 3 Operating systems : Windows 7/2000/XP, Linux. 4 Software Packages : MS Office. 5 FPGA : Spartan device AREAS OF INTEREST: 1ASIC, VLSI, RTL, FPGA, Shell ... - Mar 31

Design Ms Office Carrier Objective Assistant Engineering

India, Hyderabad, AP
... Knowledge of VERILOG HDL. 1. Knowledge of all editions of windows & MS Office. Achievements: 1. Participated at IKYA 2009 ROBOTIC fest in Vathsalya Institute of Science and Technology. 2. Participated at NATIONAL LEVEL ROBOTICS in PADMASRI Dr. B.V.R ... - Mar 31

Design Experience System Data Test Driver Engineering

India, Bangalore, KA
... > Experience in designing synthesizable RTL models in Verilog HDL. > Test bench and test cases development in SystemVerilog. > Knowledge in verification methodology. > Experience as in using industry standard EDA tools for front design and ... - Mar 31

Design System Experience Vlsi Career Objective

India, Mumbai, MH
... Good digital design background including Hardware languages like Verilog and Vhdl. Very Good Knowledge in Verification Methodologies like System Verilog and UVM. Experience in using industry standard EDA tools for the front-end design and ... - Mar 31

High School Computer Engineering Engineer Electrical

Pittsburgh, PA
... Skills & Expertise Python Coding Languages producing PCB Java HTML 5 Foreign Languages Presentations Management Atomic Spectroscopy Chemical Processing Verilog Technical Writing Software Development Leadership Page1 Education Carnegie Mellon ... - Mar 31

Project Design Computer Engineering Power Electrical

India, Bangalore, KA
... H/W Languages: verilog,vhdl. Operating Systems: windows, linux. EDA tools : modelsim,cadence(Virtuoso schematic Editor, Virtuoso layout Editor,Analog Design Environment,Assura),tanner,LTspice,Quartus,xilinx,Icarus. COLLEGE PROJECTS : PROJECT 1: ... - Mar 31

Power Plant Electrical Engineering System Service

Kenosha, WI
... wer system relaying, Ad vanced co ntrol syste ms, Electrical Machines, Network Analysis, Wireless communications, Radar, Verilog HDL CERTIFICATIONS: Fundamental of Engineering (F.E/E.I.T), NCEES Michigan May 2013-Present Custo mer service training, ... - Mar 30

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