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Verilog,VHDL,System verilog,shell script,Perl script

India, Noida, Uttar Pradesh map
... Wrote algorithms in Verilog HDL at RTL for Architecture. Verified with several testbenches and synthesized in Xilinx ISE The design has been implemented on a range of FPGAs to compare the performance . Common-Gate Low-Noise Amplifier(LNA) A fully ... - Jan 26

Project High School

India, Ambavaram, Andhra Pradesh map
... Board of Narayana Junior 89% Intermediate(MP Intermediate college 2006-2008 C) Education SSC Board of Spark High School 2005-2006 75% secondary education TECHNICAL SKILLS Programming languages: C, verilog. Tools: Basics of cadence, intensive unified ... - Jan 26

Data Engineering

India, Ambavaram, Andhra Pradesh map
... Technical Skills: Programming Language: C Hardware Description Languages: VHDL, Verilog Circuit Design and Analysis Tool: Altera Quartus II, Xilinx FPGA: Acquainted with Altera DE2 Boar Academic Projects: Title : FPGA Implementation of Sine and ... - Jan 26

verilog,vhdl VLSI front end design, systemverilog and back end design

India, New Delhi, Delhi map
... Have taken training in Hardware Descriptive/Verification Languages: VHDL, Verilog HDL, SystemVerilog. PROFESSIONAL ACTIVITIES AND EXPERIENCE: Academic Projects:- Project name: “Content based image retrieval using wavelet transform ”, on “MATLAB”. ... - Jan 26

Project Design

India, New Delhi, Delhi map
... Have taken training in Hardware Descriptive/Verification Languages: VHDL, Verilog HDL, SystemVerilog. PROFESSIONAL ACTIVITIES AND EXPERIENCE: Academic Projects:- Project name: “Content based image retrieval using wavelet transform ”, on “MATLAB”. ... - Jan 26

Project Power Plant

India map
... ● Languages: C, Verilog, VHDL ● Databases: Oracle, SQL Server. ● Research: Matlab, VLSI Design ● Others: HTML, XML, MS Office, UML. ● AREAS OF INTEREST: ● VLSI Systems Design ● Robotics ● Machine Vision ● Computer Architecture ● Computer-Aided ... - Jan 26

Project High School

India, Ambavaram, Andhra Pradesh map
... SKILLS Application Software: MS Word, MS Power point, Internet Explorer, email Operating systems: Windows XP Languages: Verilog Hardware Descripition Language Simulation Tools: MATLAB, MutiSim, ModelSim11.0Version, Xilinx13.2Version Technologies: ... - Jan 26

electronics and communication engineering

India map
... > Core languages : VHDL,VERILOG SIGNIFICANT ACHIEVEMENTS > Stood 2st during my academics in WISE engineering college. CO-CURRICULAR ACTIVITIES: > Participated in CYBORG Robotic workshop. > Organized and participated in TECHNOHOLIC-2K13.. > ... - Jan 26

Engineer Test

Santa Clara, CA map
... 9 U niversity of California Santa C ruz 1994 B.S Computer Engineering Languages: Assembly on 6800/80x86, C, C++, Python, Java, Ruby, Java, Perl, Tcl, Tk, Expect, Selenium, Verilog, HTML. Stanford University 2013 - Present Advanced P roject ... - Jan 25

Electrical Engineering Design

Lancaster, CA map
... Created a project in Xilinx ISE and implemented the state machine step by step in Verilog . Simulated and debugged the code using ModelSim to make sure it ran correctly and then downloaded it to the FPGA board . Connected the FPGA board with the ... - Jan 24
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