verilog resumes 5
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Project Engineering

India, TN
... Computer Skills Languages : VHDL, Verilog HDL. Packages : Ms-Office & Photoshop. Designing Tools : Xilinx 14.1, MATLAB 2014, Ki-cad & Multi Sim. Operating Systems : Windows & Linux. Personal profile: Father's Name : Mr. RAVINDHER P Gender : MALE ... - Oct 02

Engineering Manager

Elmsford, NY
... Computer Architecture, Billion Transistor Computer Architecture(GPGPU), Principle Of Computer System Design SKILL SET C,C++,Verilog,VHDL,System Verilog,Perl,Tcl,Cuda,Matlab,MPI,OpenMP Programming Skills Tools and Platforms Xilinx ISE,ModelSim,Xilinx ... - Oct 02

Project Management

India
... Languages: C, MATLAB, Verilog HDL. . Operating Systems: Windows-7/XP. EXPERIENCE . Working as a Laboratory Faculty in Engineering college since 1year. PROJECT PROFILE Project 1 :(mini project) SOLAR MOBILE CHARGER . Description: Converting the ... - Oct 02

Engineering Project

India
... Programming Knowledges: C, Embedded C, C++, Verilog, Assembly Language (Intel 8085, 8051) Design Software's : Keil, MPLAB, Quartus II, MPLab, and Proteus. Others : Hands on Experience in PCB Board, ARM, 8051 MAJOR PROJECT'S / CONFERENCE/JOURNAL UG ... - Oct 02

Project Design

India
... Simulation of the PCI-Express protocol(Physical Layer) was carried using Verilog, VCS and Xilinx ISE. 2) “Home And Office Surveillance And Automation Robot” B.E. Final Year Project: This autonomous robot navigates along the wall and measures the ... - Oct 01

Engineer Design

India, Gandhinagar, GJ
... • Expertise in writing Verilog/Systemverilog designs from specifications, Static Timing Analysis, Verification using Systemverilog Testbenches including Directed and Random testcases generation, Perl scripting. • Solid background in Digital Logic ... - Oct 01

Engineering High School

India
... For example, I have recently been quite active in delivering seminars on the technical papers in Embedded Systems, VLSI and VHDL-Verilog. In high school I won the State level Essay writing Competition in English. Organisational / managerial skills I ... - Oct 01

Project Software

India
... of Secondary Education 60.20% 10th Central Board of Secondary Education 72.83% Skills Programming Languages C, C++, Perl, Verilog HDL, VHDL, Assembly Language (elementary knowledge) Operating Systems Linux, UNIX, Windows xp/7/ 8 Software ALTERA- ... - Oct 01

Engineering Project

India, Mumbai, MH
... I had hands on experience on Verilog coding, AAC (Advance Audio Codec), Microsoft visual studio, Eclipse and the latest tools used in Industries. . I have presented and published technical papers at National and International conferences. . Ability ... - Oct 01

High School Engineering

India, Bengaluru, KA
... • Languages: C, VHDL/Verilog, Mat lab. • Microprocessor 8086 Assembly language • Microcontroller 8051 Assembly language and C programming • VLSI, micro wind and digital schematic • PIC Microcontroller (pic 16f677 C programming) Projects: Project 1:- ... - Oct 01

Design Training

India, Ghaziabad, UP
... Design a microcontroller in verilog HDL . To design and verify the AMBA APB TIMER in verilog HDL . Room light controller with visitor counter . Ultrasonic transmitter and receiver SKILLS . Working knowledge of Verilog HDL . Working knowledge of VHDL ... - Oct 01

VHDL & Verilog Programming

India
... P.C.M Agarwal Public C.B.S.E Board 2008 65% School,Indore (M.P.) S.S.C - Carmel Convent C.B.S.E Board 2006 76% School, Neemuch (M.P) Skills > Languages : C& C++ Programming, Basic of VHDL Verilog. > Tools : Codeblocks, Microsoft Visual Studio, ... - Oct 01

BE ECE fresher

India, Bengaluru, KA
... : Fundamentals of HDL(both VHDL and Verilog). Operating system : Windows xp, Windows 2007, Windows 08. Application Software : Microsoft office package. Personal Details Name : Preethi D’Souza. Date of birth : 24/07/1992 Gender : Female. Father’s ... - Oct 01

digital and mixed circuit designing,ATPG, testing,C,verilog,VHDL

Carbondale, IL
... Hardware Languages : Verilog HDL, VHDL. Tools : CADENCE, SYNOPSYS, Modelsim, B2 spice. Package : MS Office(complete package), Adobe Photoshop. . VLSI Design and Test Automation - Introduced to SYNOPSYS and CADENCE tools with VCS MAX and NCLaunch ... - Sep 30

Project Engineer

India
... Languages: 'C', C++, VHDL, VERILOG, Network analysis. . Tools: Matlab, Xilinx, Model SIM, P-SPICE, H-SPICE, LT-SPICE . Strong basics in core subjects Strengths . Adaptability . Self-learning attitude . Positive thinking . Accepting feedback and ... - Sep 30

VLSI Design

India, Bengaluru, KA
... Computer Organization and Microprocessors VLSI Design Lab Microprocessor Lab S KILLS Programming Languages: python, C, Verilog HDL, Perl Packages: Xilinx ISE, ModelSim, Eldo, Matlab P ROJECTS Approximated Hardware for Pedestrian Detection (Dual ... - Sep 30

Pursuing M.Tech in VLSI& Computer Engineering from IIIT-Hyderabad

India, New Delhi, DL
... Domain Specific Languages: Basics of Verilog, System Verilog, H-spice. Scripting Languages: Shell Scripting, Python, JavaScript. Tools: Cadence’s Virtuoso Tool, LTspice, Modelsim. Protocols: (Designed and Verified in System Verilog using Questasim ... - Sep 30

Engineering Training

India, Bengaluru, KA
... 2010 RJS PU COLLEGE, 70.00% SSLC – 2008 Sisa Kendra, 77.76% Software Skills C programming Core Java Big Data – Hadoop VHDL, Verilog Core Skills VLSI Embedded Systems Microprocessor 8086, Microcontroller 8051 Soft Skills Flexibility and Adaptability ... - Sep 30

Engineer Project

India, Bengaluru, KA
... HDL : VHDL, Verilog, SystemVerilog Verification Methodology : UVM. Synthesis Tool : Design Compiler (Synopsys)(Beginner), VCS(Synopsys) STA : Prime Time (Synopsys) (Beginner). Schematic /Layout Editor :Virtuoso (Cadence)(Beginner), Microwind,DSCH ... - Sep 29

Project High School

United States
... Secondary 2008 Kotapalle, Piler 68.8% Education TECHNICAL SKILLS: Operating Systems : Windows 7,8, 8.1,Ubuntu 14.10 Languages : Basics in C, Verilog HDL, VHDL, MATLAB, P-spice MS Office 2014, Open Office, Google Doc’s Office Tools : Tools : ... - Sep 29
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