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ASIC Design Engineer, VLSI

India, Bengaluru, Karnataka map
... TECHNICAL SKILLS Programming Skills: Basics of C,C++, Verilog, VHDL Tools: Matlab, Synopsys Custom Designer, Cadence Virtuoso, Xilinx ISE, Modelsim, Microsoft Office Platforms: Unix, Windows PROJECT WORK Project Name : Advance Security System using ... - Jul 29

Engineering Higher Secondary

India, Coimbatore, Tamil Nadu map
... C, C++ Verilog Software known Orcad Lsim Matlab Xilinx ISD 13.2 Area of Interest Networks Microprocessor Awards and Achievements Won RAJYA PURASKAR award for The Bharat Scouts & Guides from Dr.Sujit Singh Barnala, Governor of Tamil Nadu in 2009. ... - Jul 28

Engineer Engineering

India, New Delhi, Delhi map
... Basic knowledge of VERILOG. Basic knowledge of SCADA(INTOUCH). Nuclear Power Corporation Of India Ltd, Narora. Prasar Bharti, Peetampura. Cooking,Listening Music. Winner of debate competition at cluster level. Participated in 2 day workshop on ... - Jul 28

Project Electrical

India, Bengaluru, Karnataka map
... Expertise in Verilog, VHDL and C languages. Good communication skills and leadership qualities. Highly motivated to work in a team and as individual. Academic Projects: 1. Project Title: Time Period Minimization of Circuit Execution in High Level ... - Jul 28

VLSI design & embedded Systems

India, Bengaluru, Karnataka map
... Function integration of simulators Strong Knowledge Areas CMOS VLSI Logic Design Embedded Systems Microprocessors SoC Signal Processing Microcontroller Network Security Languages Known VHDL Verilog Basic C Tool Used Cadence Xillinx Model Sim Matlab ... - Jul 28

FPGA/RTL Design Engineer

India, Bengaluru, Karnataka map
... Skills EDA Tools : Xilinx ISE 13.2,Vivado 2014.2, Actel Libero IDE, ModelSim, Matlab/Simulink Languages : VHDL,Verilog Domain Knowledge: QAM, DUC/DDC, ASIC Design Flow Interfaces: GPMC, SPI, I2C, UART Experience Employer : Mistral Solutions Ltd. ... - Jul 27

Test/ Validation Engineer

Portland, OR map
... Key Skills: * Expertise: DFT, Analog & Mixed Signal Circuit, PLL, Bluetooth, RF/High-Frequency Circuit, Optical Inter-Connect * Tools: TPIE, Primetime, Debussey, Netview, Cadnav, Opus * Languages: Perl, C/C++, Assembly, RTL, System Verilog, VHDL * ... - Jul 27

Engineer Design

India, Maharashtra map
... SSC from Apeejay School (CBSE board) in 2005 Skills Operating Systems : Windows Family VLSI Programming Languages : VHDL, Verilog HDL, System Verilog, Hspice Layout Tools : Advanced Modelism, Microwind,CADENCE Pspice AD VLSI Programming Tools : ... - Jul 27

Electrical Engineer Customer Service

Lubbock, TX map
... Thermodynamics (ME-2322) South Plains College, Levelland, TX July 2005 A.S in Science Skills AutoCAD Visual 2012 MatLab C, C++, Verilog programming Networking LT Spice FPGA, Microcontroller Microsoft Word, Excel, Power Point Desktop/Mobile computer ... - Jul 27

Software Testing

India, Mumbai, Maharashtra map
... Ltd., Noida (Jun’13 – Aug’13) Project Title : Verilog HDL Objective: Learning Hardware Description Language for Digital chip designing and manufacturing. Methodology: Using EDA Tools, XILLINX (6.1), ModelSim (For Simulation), FPGA Kit (For Physical ... - Jul 27
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