verilog resumes 10
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intern at BARC mumbai, vlsi engineer

India, New Delhi, DL
... • Technical Skills HDL languages (VHDL, Verilog),silvaco and cadence basic knowledge. • Knowledge and practice of cadence schematic entry and layout design. • Hade designed in BARC project . • Knowledge of C, C++. • Had attended robotics workshop. • ... - Sep 15

student

India, Bengaluru, KA
... Software/applications: ms word, ms excel, ms power point, corel draw, Matlab, cadence, keil, xilinx ise (verilog), pspice, multisim . Programming languages: C, C++, data structures using C. Projects: Research based project on building a low cost ecg ... - Sep 15

Marketing Manager

Canada, Markham, ON
... Digital Logic- Verilog hardware language Design Skills . Photoshop, InDesign, Dreamweaver, Wordpress, Joomla References . Available upon ... - Sep 15

Engineer Electrical

Houston, TX
... Verilog, VHDL, VCS, Signalscan, VIEWLogic, Altera Max Plus II, and Xilinx Foundation . PCI, PCI-X, VME, SCSI design . Assembly language for TI, Freescale, and Intel processors . TI and Analog Devices DSP design experience . Digital Systems Design . ... - Sep 15

Design Engineering

India
... 875******* Summary of Qualifications Good understanding of the ASIC and FPGA design flow Experience in writing RTL models in Verilog HDL and Test benches in SystemVerilog Very good knowledge in verification methodologies Experience in using industry ... - Sep 15

Electronics Engineer

Turkey, Istanbul
... digital design experience using Cadence and VHDL Summer Intern at MKR-IC, Microelectronics Summer 2008 SAR ADC design using Verilog and Cadence Summer Intern at ABB, Automation and Power Technologies Summer 2007 Achievements and Scholarships Nov. ... - Sep 14

Engineering Project

India, Suri, WB
... Proficient in Sl Software and / or Hardware Platforms Familiar / Proficient in No Progrmming languages: C,Assembly,Matlab,Verilog,Basics of java 1 Hardware: FPGA,8051 kit 2 Operating systems: Windows 8/7/vista/xp, ubuntu,fedora,android 3 Simulators: ... - Sep 12

Design Electrical Engineering

Los Angeles, CA
... *** #** Los Angeles, CA90007 acfwsa@r.postjobfree.com Tel: 213-***-**** Career Objective Seeking a fulltime/intern position in ASIC design/verification Core Qualification Solid working experience with RTL design and verification using Verilog, ... - Sep 12

A post graduate, looking to start off career with core job

India, Vijayawada, AP
... Knowledge of VHDL and Verilog. Working Knowledge of Xilinx, Cadence gpdk90nm and UMC 0.18µm simulators. Programming knowledge of C & Data structures, C++. Extra - Curricular Activities Held classes for GATE aspirants while pursuing M.Tech. Worked as ... - Sep 12

FPGA Design Engineer

Canada
... Knowledge Areas: Altera FPGA families Modelsim Protocols: Ethernet, TCP/IP Xilinx FPGA families NCSim Processor & Microcontroller High speed logic design Constrained Random Tests C, Pyhton SERDES ISE, ChipScope PCIe, Wishbone Verilog and System ... - Sep 11

M.Tech. in digital Systems

India
... (Electronics), Ramdeobaba College of Engineering and Management, Nagpur, 60.36%, 2010 TECHNICAL SKILLS Languages C, OPENCV, Verilog, System Verilog (basic) Design Digital System, VLSI, Embedded, ASIC, Microcontroller Tools MATLAB, Visual Studio ... - Sep 11

Project School

India, Bengaluru, KA
... TECHNICAL SKILLS Programming Languages: Verilog, Assembly level coding, Basics of C. Operating System: Windows, Linux. Tools : Cadence tool, Matlab, Microwind, Xilinx. ACADEMIC INTERESTS CMOS VLSI Design, Embedded Systems, Microprocessors. ... - Sep 11

High School Design

India, Bengaluru, KA
... Technical Skills: HDLs: Verilog Scripting Language : Perl,TCL EDA Tool: RTL Compiler, Conformal Low Power, Cadence Encounter, Olympus Domain: ASIC/FPGA Design Flow, Digital Design methodologies Perl . > finding the cells and instances in given ... - Sep 10

Good at rtl design,verification,synthesis,physical design.

India, Hyderabad, Telangana
... *CGPA (out of 10) Software Exposure Languages : Verilog,Basic concepts in PERL,C Simulator Tools : VCS simulator, H-Spice Synthesis Tools : Design compiler Operating Systems : Windows, LINUX INDUSTRIAL EXPOSURE: . Undergone in-plant training at ... - Sep 10

Engineering Power

Hayward, CA
... GPA: 8.0/10.0 TECHNICAL SKILLS Hardware skills: VHDL, Verilog, System Verilog, OVM, UVM, Cadence, Synopsys, LabView, Licensed HAM radio operator Software skills: C, C ++, MATLAB, UNIX, Perl, TCL, Shell, OOP programming COURSEWORK VLSI Circuits and ... - Sep 10

Project High School

India, Hyderabad, Telangana
... JUNIOUR COLLEGE 2005-2007 81.9 SSC GAYATRI ENGLISH MEDIUM 2004-2005 70.33 HIGH SCHOOL Technical Skills: Operating Windows : MS Office (Word, Excel and PowerPoint) Programming Languages : Verilog Tools : VCS, HSIPCE, Microwind Certifications: . ... - Sep 10

Engineer Engineering

India, Hyderabad, Telangana
... TECHNICAL SKILLS Languages : Verilog,Basic concepts in PERL Simulator Tools : VCS simulator, H-Spice Synthesis Tools : Design compiler, IC Compiler Operating Systems : Windows, LINUX AREAS OF INTEREST Digital electron. ACADEMIC PROJECTS: M.TECH: ... - Sep 10

Project High School

India, Hyderabad, Telangana
... > Languages : Verilog,Basic of PERL,C, System Verilog basic > Simulator Tools : Synopsys VCS simulator > Synthesis Tools : Synopsys DC compiler > ATPG Tools : Synopsys Tetramax > Operating Systems : Windows, LINUX Project: Design and Verification of ... - Sep 10

Engineer Project

India
... Have hands on experience on System Verilog Verification and worked on developing verification environment using SV. Possess good knowledge on UART protocol. Have good knowledge and work experience on Altera-FPGA. Knowledge on Linux. Good ... - Sep 10

Engineer System

Vacaville, CA
... Jan/2006 - Apil/2006 (FPGA Class) Advance Verilog 2001 syntax, Algorithm State Machine (ASM) design of FIFO, PCI, UART, and Microprocessor. RTL coding, State Machine, set up time, and register. Project using Altera Quartus II, SW with simulated with ... - Sep 10
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