India, Bengaluru, KA
... ngspice, Hspice Ltspice, Debussy, ADMS, Finesim, Eldo Languages Known: Perl, TCL, Skill, Shell, C, system C HDL's: VHDL,
Verilog, VerilogA UNIX Utilities: SED, AWK Full-Device Verification: Module and chip level Verification of Analog and Power ...
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Jan 31
Houston, TX
... • Content Management System Setup, Administration, SQL database management, Customization and Theming using Drupal 7.18 •
Verilog and VHDL for coding of embedded systems like Keypad Scanner and Alarm system • ModelSim 10.0c and Quartus I I 11.1 for ...
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Jan 31
Mountain View, CA
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Verilog and MATLAB Technical Networking Familiar with Voice-XML programming Familiar with Cisco Systems VoIP solution Familiar with Fortinet FortiGate firewalls configuration Familiar with Cisco Systems switches and routers configuration Prof. ...
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Jan 31
Singapore
... *****, Quasi-Delay-Insensitive Compiler: Automatic Synthesis of Asynchronous Circuits from
Verilog Specifications, IEEE International Midwest Symposium on Circuits and Systems, IEEE MWSCAS 2011, Seoul, Korea, 7- 10 Aug 2011. 6. J. Chen, K.S. Chong, ...
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Jan 31
Chicago, IL
... Programming languages: Python,
Verilog, VHDL, C, C++, HTML, Assembly Language, tcl/tk; . Applications: Modelsim, Hspice, Protel, Dreamwaiver, Matlab, MS Office applications, Ulead VideoStudio; . Mobile Device Testing Tools: Android Debugging Bridge, ...
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Jan 30
Houston, TX
... Designed and implementation very high throughput, high e ciency, low complexity ASIC architectures using
Verilog HDL. Tools: MATLAB simulation, xed-point simulation in C,
Verilog HDL. Proposed and implemented a exible router architecture to ...
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Jan 30
Loveland, CO
... Multi Language fluency with SystemVerilog,
Verilog, VHDL, SystemC, SVA. Experience with Synthesis (SYNOPSYS, SYNPLICITY, Xilinx and Altera, System Generator). Clock Domain Analysis (0in CDC), OVM, SVA, Java Top Secret Clearance. SPECIALTIES * ...
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Jan 30
Lafayette, IN
... translated Z in ru ions into RISC ops
Verilog and VHDL S- : Ninety-Nine Scala Problems Scala with JUnit Formal veri cation of a secure hypervisor ACL Proje Euler F# and bluespec HONORS AND AWARDS MCD Fellowship - Burton D. Morgan Entrepreneurship ...
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Jan 30
Richardson, TX
... ACADEMIC PROJECTS 1)VLSI Layout & Verification Project: Designed a vending machine which contained over 3000 cells based on
Verilog, using Cadence and Synopsys. Carried out the layout using the cells generated in self-designed cell library. 2)SRAM ...
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Jan 29
Raleigh, NC
... HTML, JavaScript, UML, SQL, Assembly, Python, Prolog,
Verilog Networking TCP/IP, Routing Protocols, VPN, ATM, Socket Programming Tools MATLAB, Simulink, PSPICE RELEVANT EXPERIENCE Software Developer, AraPendar Company, Shiraz, Iran Summer 2010 . ...
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Jan 29
Vista, CA
... Duties: Network communication COFDM transmitter and receiver system to board level design, schematic capture, PCB layout, FPGA/CPLD HDL (
Verilog) coding, debugging and testing to made system and board start up. Wrote test procedure document, made ...
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Jan 29
Framingham, MA
... He is also well versed in the softer side of product development, having executed both firmware and software projects in
Verilog, ABEL, VHDL, C, BASIC and various machine languages. He has a strong sense of ownership of anything he has designed, and ...
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Jan 29
Farmington, MI
... 5 Engineering Software Unigraphics, IDEAS, Pro-E, OrCad, Zuken, PSPICE,
Verilog Thermodynamic Software Thermo Cal, Rad Therm, Flow Master v. 7 Richard Penderel Resume Page 3 of 3 Chris Cardine (GD) 586.***.**** & (C) 586.***.**** Jeffery Albertson, ...
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Jan 29
Huntsville, AL
... KEY SKILLS Hardware Modeling: VHDL RTL coding, synthesis and simulation,
Verilog, VIVA (Starbridge systems), SystemVerilog Hardware Design Tools: Xilinx ISE, Altera Quartus/Maxplus, Leonardo, ModelSim, Synopsis Hardware/Software Codesign: Xilinx ...
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Jan 29
Stanford, CA
... PROGRAMMING C/C++, Java, Matlab, Scilab, PERL,
Verilog, VHDL, Spice. SKILLS Implemented noise preprocessing front-end for video in C++. Used Matlab for simulation of Wireless/Digital Communication systems, Error Correcting Codes, Control Systems, ...
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Jan 29
India
... Award for being in top 0.01% in JEE 2008 TECHNICAL SKILLS Programming Languages: Java, Python, C, Prolog, SML, HTML, SQL, VHDL,
Verilog Tools and Services: Netbeans, Latex, Lex, Yacc, Xilinx, PC-SPIM, Logism, Google App Engine CMS: Drupal, Joomla ...
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Jan 29
India
... and Information Tech (percentile > 99.5) NSEP Quali ed the National Standard Examination in Physics (Patna center) Languages: Opengl, C, C++, Java, Haskell, SML, oz,
Verilog, Assembly Language for IA32 Architectures, Technical Shell Scripting ...
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Jan 29
India
... Ajay Jain (Computer Science and Engineering Department,IIT Kanpur) Implementation of a functional processor of the SDLX family on an FPGA with all the functions including delayed branch semantics.Coding was done in
verilog and tested on Xilinx ...
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Jan 29
India
... in SSC Class 3 rd position in B.Tech Skill Set Programming Languages C, C++, Pspice,Matlab Hardware programming VHDL,
Verilog, ALP of 8085, 8086, languages Motorola 68020,FPGA(mentor graphics) Operating Systems Windows 95/98/ME/2000/XP, MS-DOS ...
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Jan 29
India
... Synthesis of Digital system : generate the VHDL/
Verilog code with the information available from the CDFG and the state-table under the guidance of Prof. Preeti Rnajan Panda. Tools used : gcc (GNU compiler Collection) 3.Physical design lab : Formal ...
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Jan 29
