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Engineering Project

India, Chennai, Tamil Nadu map
... Programming and VHDL, Verilog, Basics of C. Script Languages Software Skills Xilinx design suite, MATLAB(simulink), MENTOR GRAPHICS EDA tool, HDL designer,VIVADO HLS tools from Xilinx, LABVIEW. Hardware FPGA. Operating Systems Windows XP, Ubuntu. ... - Sep 01

Design Project

India, Bengaluru, Karnataka map
... Programming language: VHDL & Verilog Programming, System Verilog-Basic, SPICE, Assembly language, C and MATLAB Programming. Hardware Platforms: Spartan 2 & 3, Virtex 2 pro & 5. Academic Credentials M.Tech in VLSI Design and Embedded system, College ... - Sep 01

Test Cases Design

India, Bengaluru, Karnataka map
... Underwent training in Verilog, System Verilog & UVM methodology at Maven Silicon Softech Pvt. Ltd., Bangalore. Keen interest in the areas of Digital VLSI Design & Verification, System Design, RTL Design and Semiconductor Devices (Simulation & ... - Sep 01

Project Electrical

India, Chennai, Tamil Nadu map
... S.L.C Don Bosco Matriculation School Matriculation, Tamil Nadu March 2008 79.6 Skills Categories Software Products Software Skills XILINX ISE 9.1i {Simulation using Verilog} MATLAB In-plant Training Communication Techniques at Port Trust, Broadway. ... - Aug 29

Engineer Electrical

New York, NY map
... COMPUTER SKILLS MS Office XP Corel Suite 8 Windows OS Linux Matlab MathCad AutoCad SolidWorks Ansys Macromedia Studio PSpice OrCad C++ ASM • Visual Basic Verilog HDL Java Protel Altera Quartus Circuit Maker Electronics Workbench LabView Rockwell ... - Aug 28

Engineering Project

India, Chennai, Tamil Nadu map
... VLSI, Microprocessors, Embedded application design and implementation, Programming Technical Skills: Languages known: C, C++, verilog, VHDL basics Applications: MS office, Matlab-Simulink, Arduino open software, Weka Explorer (Machine learning ... - Aug 27

Engineer Years Experience

Santa Rosa, CA map
... Network Pattern Recognition Hardware Engineering : oAnalog and Digital Electronic Design, Concept and P-CAD Schematic, Verilog HDL, VHDL, Abel oFPGA (Altera APEX, Xilinx Virtex), CPLD (Lattice, Xilinx) oDSP for Xilinx FPGA (Virtex-4, Spartan-6) ... - Aug 27

Software Engineer Medical Device

Schaumburg, IL map
... Becker Enclosure-Appendix: WILLIAM BECKER LANGUAGES & SUPPORT: C, Visual C++/C#/embedded Visual C++/CE 6.0, OpenGL/OpenCV, Java/Swing, Perl, J2EE, Device, ELB, Drivers, RTOS/Verilog, Django, Python, GIT, SQL, DB2, IIS, Unix, Linux, VC8.0, DICOM/HL7 ... - Aug 27

Project Engineering

India, Pilani, Rajasthan map
... VLSI Design Language: VHDL, VERILOG, OPENCV. Design Tools: XILINX10.1, VIRTUOSO, SILVACO, Visual Studio. Area of interest: CMOS, Analog Circuits, Digital System, Image processing. SUMMER INTERNSHIP DETAILS (Apr 2012 – May 2012) Gone through 6 week ... - Aug 27

M.Tech Graduate.Presently working as a Lecturer

India, Kottayam, Kerala map
... Mini Project, “An efficient design of FSM based 32-bit unsigned high-speed pipelined multiplier using Verilog HDL” done at Laxmi infotek, Kalamasserry, towards the partial fulfilment of requirement for the award of the degree M.Tech. Main Project, ... - Aug 26
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