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Engineer Engineering

Fremont, CA map
... Music Synthesizer - Emulated the specific analog components in Verilog on FPGA board from the Minimoog design which is able to generate a 16-bit audio with several switchable waveforms. Scheme Interpreter - A simple Scheme interpreter written in ... - Jan 29

Digital electronics,verilog,system verilog,UVM.

India, Bengaluru, Karnataka map
... ** Summary of Qualifications Good understanding of the ASIC and FPGA design flow Extensive experience in writing RTL models in Verilog HDL and Testbenches in SystemVerilog and UVM Very good knowledge in verification methodologies Experience in using ... - Jan 29

High School Project

India, Hyderabad, Telangana map
... Hardware Description : VHDL, Verilog Language Operating system : WINDOWS (XP/VISTA/7/8), linux installation. Application Software : C, Microsoft office (2003, 2007, 2010). ACHIEVEMENTS: Certified as merit student in SSC examination by Hyderabad ... - Jan 29

Design Engineering

India, Allahabad, Uttar Pradesh map
... Summary of Qualifications > Good understanding of the ASIC and FPGA design flow > Experience in writing RTL models in Verilog HDL and test benches in SystemVerilog > Very good knowledge in verification methodologies > Experience in using industry ... - Jan 29

Project Engineer

India, Bengaluru, Karnataka map
... • Detailed knowledge of SCEMI and DPI based verification methodology and its implementation on Mentor Veloce and Synopsys Zebu Emulation platforms • Experience in porting System Verilog Assertions and Coverage based methodology using transaction ... - Jan 28

VLSI Engineer

India map
... 2010 81.42% Distinction 4 M.TECH(VLSI) JNTU 2013 82% Distinction SOFTWARE SKILLS: LANGUAGES KNOWN: C, C++, VHDL, verilog OPERATING SYSTEM: Windows XP, Windows 98, Microsoft Office EXPERIENCE : 1 Year( Worked as an assistant professor in ECE Dept. ... - Jan 28

Engineer Project

India map
... Implemented Time domain demux with serial to parallel conversion in verilog using fpga advantage. Implemented Round robin scheduler for rate based queues in verilog using fpga advantage. Quick in debugging. Good Knowledge in digital design. ... - Jan 28

Training Engineer

India, New Delhi, Delhi map
... Hardware Description Languages : Vhdl, Verilog, System Verilog. . Software Skills : C & C++ . Platforms : Windows. . Hardware Expertise : CPLD, FPGA Board (Spartan 3) . DT Survey Tools : Map Info,Tems,Google Earth.(Work in tool) Technical Expertise ... - Jan 28

M-Tech in VLSI Design,Major paper got selected for IEEE conference.

India, Ambavaram, Andhra Pradesh map
... TECHNICAL SKILL SET Designing TOOLS: Cadence, Xilinx (ISE Design Suite), Modelsim, HSPICE, Tanner Languages : Verilog, VHDL, C++ EXTRA CURRICULAR ACTIVITIES • Participated in quiz and poem recitation competition • Participated in 100m and 400m relay ... - Jan 27

M-Tech in VLSI Design,Major paper got selected for IEEE conference.

India, Ranchi, Jharkhand map
... TECHNICAL SKILL SET Designing TOOLS: Cadence, Xilinx (ISE Design Suite), Modelsim, HSPICE, Tanner Languages : Verilog, VHDL, C++ EXTRA CURRICULAR ACTIVITIES • Participated in quiz and poem recitation competition • Participated in 100m and 400m relay ... - Jan 27
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