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Electrical Engineer Design

Santa Clara, CA
... ASIC Design flow of a 20 BIT ALU using IBM 130nm technology Fall 2014 •ALU performing 21 operations was designed and coded in RTL Verilog. A standard cell library was created and characterized using SiliconSmart and Verilog code was synthesized ... - Aug 30

RTL to GDS II, Verilog, System Verilog, TCL, Perl, C

Austin, TX
... Physical design Computer Architecture Digital Signal Processing Areas of Expertise: CMOS IC design & fabrication fundamentals RTL to GDS II flow Expert in Verilog, C and Matlab TCL, Perl, Csh Scripting Experience on Unix/Linux Work under minimal ... - Aug 29

Physical Design Intern

San Jose, CA
... Efficiently managed the student group and successfully assisted them with their RTL based design projects. INFOSYS LIMITED Chennai, India Senior Software Engineer, Software Engineer & Software Engineer Trainee Mar 2012 - Jun 2014 Spearheaded the ... - Aug 29

Design Electrical Engineering

Raleigh, NC
... Skills & : RTL (Design, Simulation, Synthesis), Functional Verification, Coverage, Assertions, Constrained Random Concepts Testing, Logic Design, Microarchitecture, Cache & Memory Hierarchy, Cache Coherence, Instruction Level Parallelism, CPU Design ... - Aug 29

Design Electrical Engineering

Houston, TX
... Solid understanding of digital IC design, Analog/Mix signal design, digital signal processing and static timing analysis Knowledgeable in RTL to GDS flow, synthesis, place and route, ASIC front end/back end design. Technical Skills Work Experience: ... - Aug 29

construction mangement( tile and marble srtter ) my trad

Santa Clarita, CA
... plor itlc tlltlcs ol'ctuPlor ttte rtl. lrre lrtiort. rrrttl rclrrrrtt lirt' scplrntlitllt Irrrrtt crttplor rttcnt. NtiXf I o INs'l l(tr(.'1'IONS I'ol{ ANSWI:RIN(;-l'lilr QUI:S l'l NS l lcsrtltctl irr rcll'rt'lrl to tlir clsion PI(uruln. ;tPPlictrnts ... - Aug 28

Electrical engineer, VLSI, verilog, RTL, testing, hardware

United States
Yang Bi 631-***-**** acwc4n@r.postjobfree.com **** ***** ***** **** Round Rock, TX 78664 Education: Stony Brook University Stony Brook,NY Master in Electrical Engineering (non-thesis) Bachelor in Electrical Engineering Graduation Date May 2015 May... - Aug 27

system admin

Upper Marlboro, MD
... Employment History IT Specialist (RTL Contractor) 9/2013-7/2016 United States Department of Agriculture 4700 River Road, Riverdale, MD 20737 Ms. Dawn Frazier, Program Manager (720.***.****) Mr. Vernon Muhammad, (301.85122520) •Maintenance and ... - Aug 26

Electronics, semiconuctors, MS office

Thousand Oaks, CA
... May 2014 Related Coursework: VLSI: CMOS Logic, Circuit simulation, Semiconductor Fabrication Processes, Layout design rules, Verilog/VHDL programming, Cadence Tool, RTL design flow, Combinational and Sequential circuit design. Linear Integrated ... - Aug 26

ASIC Physical Design Engineer

Santa Clara, CA
... Using the formality tool equivalence checking was successfully done between RTL and netlist. • RTL Design of Single Cycle Datapath of 32-bit MIPS Processor Designed a single cycle datapath for R, I and J type of instruction formats and implemented ... - Aug 24
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