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digital networking

India map
... Attended two day National Level Workshop on “CIRCUIT SIMULATION & PCB DESIGN USING EDA TOOLS” on 10th & 11th September 2012, organized by UNITED INSTITUTE OF TECHNOLOGY, COIMBATORE. PROJECT REPORT: ANTENNA DESIGN The Electronic devices emit ... - May 02

Verilog HDL designing,FPGA implementations, testbenches verification

India, Bengaluru, Karnataka map
... Ability to work on EDA tools to synthesized various RTL schematic designs. Ability to communicate in both written and oral forms. TOOLS & COCEPTS Tools: ModelSim, Xilinx ISE Design suit 14.2, Cadence, EDK, Simulink and System Generator. Hardware ... - May 01

Project Engineer

India, New Delhi, Delhi map
... Operating Software: NI LabVIEW 2013, ModelSim PE Student Edition 10.1b, Xilinx ISE Design Suite 12.1, Digilent Adept System v_2.8.1, EDA (Electronic design automation) tanner tools (L-edit, T-edit, S-edit, and W-edit) and MATLAB. Operating System: ... - May 01

Digital Design,Verilog,System Verilog,Uvm Methodology

India, Bengaluru, Karnataka map
... HDL and Test benches in SystemVerilog Very good knowledge in Verification methodologies(UVM) Experience in using Industry Standard EDA tools for the front-end design and verification VLSI Domain Skills HDLs: Verilog HVL: SystemVerilog Verification ... - May 01

Design System

India, Bengaluru, Karnataka map
... HDL and Test benches in SystemVerilog Very good knowledge in Verification methodologies(UVM) Experience in using Industry Standard EDA tools for the front-end design and verification VLSI Domain Skills HDLs: Verilog HVL: SystemVerilog Verification ... - May 01

VLSI Design

India map
... Technical Skills : • Hardware description languages : Verilog HDL, Basic Knowledge on System Verilog, VHDL • EDA Tools : Xilinx, QUESTA SIM, Model SIM • Programming Languages : C,OOP, Java • Web Programming : HTML • Knowledge : Digital Electronics, ... - Apr 30

Project Design

India, Bengaluru, Karnataka map
... Duration : Current Platforms : Intel Workstation Operating Systems : Linux RHEL 5 Development Languages : System Verilog EDA Tools : Mentor Questa Other tools : Perl Description: Verification of a Dual Port RAM My Contribution: Prepared a class ... - Apr 29

Engineer Development

India map
... 3+ years Experience in using Industry Standard EDA Tools for Front-End Verification. . Adept at verifying ASICs using SystemVerilog as well as in Coverage Driven verification methodology. . Experience in developing a thorough test plan, Strong ... - Apr 28

Manager Data

Naperville, IL map
... sales tool applications: • Providing Level 1 – Level 3 Support Data Warehouse Implementation Analyst RRD Enterprise Data Architecture (EDA) 1997 – 1999 Responsible for development and delivery of training and installation of web based data warehouse ... - Apr 27

I have a strong background in diverse fields such as VLSI Design Techn

India, Mumbai, Maharashtra map
... Back end tool : Tanner EDA 14.1, MATLAB. PROJECTS UNDERTAKEN: P.G Project (On going): > Implementation of Pipelined Hardware Architecture for AES Algorithm using FPGA. (under the guidance of Mr.J.Senthil Kumar Assistant Professor at Mepco Schlenk ... - Apr 27
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