| Resume alert | Resumes 81 - 90 of 6296 |
C++ Embedded Systems
Houston, TX
... Good Gained technical knowledge in coding and testing of Digital systems and Languages like C, C++, Embedded C, Perl, System Verilog through tools like Keil, Xilinx, LabVIEW, HSpice, Cadence. Gained good Knowledge in Oscilloscopes, Spectrum ... - Jan 18
... Good Gained technical knowledge in coding and testing of Digital systems and Languages like C, C++, Embedded C, Perl, System Verilog through tools like Keil, Xilinx, LabVIEW, HSpice, Cadence. Gained good Knowledge in Oscilloscopes, Spectrum ... - Jan 18
Electrical Engineering Verification Engineer
Long Beach, CA
... USING XILINX VIVADO (01/2021 – 04/2021) • Implemented a MOD 30 counter, FSM Designs, Power optimization circuit, high throughput and low latency circuit, 4-way traffic light control circuit and a coffee vending machine circuit using Verilog. ... - Jan 18
... USING XILINX VIVADO (01/2021 – 04/2021) • Implemented a MOD 30 counter, FSM Designs, Power optimization circuit, high throughput and low latency circuit, 4-way traffic light control circuit and a coffee vending machine circuit using Verilog. ... - Jan 18
Project Manager Product
Lawrenceville, GA
... Manage the design efforts for the firmware for Xilinx (FPGAs, CPLDs) and SoC (using VHDL/Verilog). In addition, assure that the SMPTE, DVB and ATSC standards are followed. Responsibilities have included the NTSC and PAL formats for the serial ... - Jan 18
... Manage the design efforts for the firmware for Xilinx (FPGAs, CPLDs) and SoC (using VHDL/Verilog). In addition, assure that the SMPTE, DVB and ATSC standards are followed. Responsibilities have included the NTSC and PAL formats for the serial ... - Jan 18
Electronics Engineer: Fpga/Asic/Soc/Pcb/Mcu/Cpu
Greensboro, NC
... LTspice, C, Spice, MATLAB FPGA based designs : Xilinx ISE, Modelsim/Questasim, Altera Quartus, Xilinx Vivado HDLs : VHDL/Verilog, SystemVerilog Scripting Languages : Python, TCL, Make, Shell Hardware Interfaces : RS232, USB, JTAG, SPI, I2C, LVDS, ... - Jan 17
... LTspice, C, Spice, MATLAB FPGA based designs : Xilinx ISE, Modelsim/Questasim, Altera Quartus, Xilinx Vivado HDLs : VHDL/Verilog, SystemVerilog Scripting Languages : Python, TCL, Make, Shell Hardware Interfaces : RS232, USB, JTAG, SPI, I2C, LVDS, ... - Jan 17
Electrical Engineer
California City, CA
... **** SUMMARY • Results-driven and highly motivated Electrical Engineering graduate student with a strong academic background and hands-on experience in Analog and RFIC design and digital design with skills of VHDL, Verilog and Cadence Virtuoso tool. ... - Jan 17
... **** SUMMARY • Results-driven and highly motivated Electrical Engineering graduate student with a strong academic background and hands-on experience in Analog and RFIC design and digital design with skills of VHDL, Verilog and Cadence Virtuoso tool. ... - Jan 17
Technical Program Product Owner
San Jose, CA
... C, MATLAB, python, SIMULINK, Verilog, Xilinx, Python, Perl WORK EXPERIENCE Aug’18 – Mar ‘23 Technical Program Manager (50% time) at Intel Research Lab, Wireless Multi-Communication Research Lab (WMCR), Santa Clara, CA, USA. MuMIMO with GNN: Working ... - Jan 16
... C, MATLAB, python, SIMULINK, Verilog, Xilinx, Python, Perl WORK EXPERIENCE Aug’18 – Mar ‘23 Technical Program Manager (50% time) at Intel Research Lab, Wireless Multi-Communication Research Lab (WMCR), Santa Clara, CA, USA. MuMIMO with GNN: Working ... - Jan 16
Computer Engineering Entry Level
West Lafayette, IN
... SKILLS • C Programming, C++, MATLAB, Python, HTML • Semiconductors • Circuit Analysis • System Verilog • Embedded Systems • MS Office – Word, Excel, PowerPoint, Google Workspace • Languages: English, Malay, Tamil OTHERS The Associated Board of the ... - Jan 16
... SKILLS • C Programming, C++, MATLAB, Python, HTML • Semiconductors • Circuit Analysis • System Verilog • Embedded Systems • MS Office – Word, Excel, PowerPoint, Google Workspace • Languages: English, Malay, Tamil OTHERS The Associated Board of the ... - Jan 16
Research Intern
New Brunswick, NJ
... • Using Verilog, the design aims to enable communication and data transfer between AHB and APB bus systems. • This project involves designing and implementing the bridge module, verifying its functionality, and compatibility with bus protocols. E ... - Jan 15
... • Using Verilog, the design aims to enable communication and data transfer between AHB and APB bus systems. • This project involves designing and implementing the bridge module, verifying its functionality, and compatibility with bus protocols. E ... - Jan 15
Machine Learning Los Angeles
Los Angeles, CA
... VHDL/Verilog Economics(Second Major); Relevant course work: Statistical Methods/Machine Learning/Engineering TECHNICAL SKILLS Skills: Python, SQL, C, Matlab, Java; Tools: AWS, Agile, Docker, Azure,Figma, Microsoft Office Suite (Excel) ... - Jan 15
... VHDL/Verilog Economics(Second Major); Relevant course work: Statistical Methods/Machine Learning/Engineering TECHNICAL SKILLS Skills: Python, SQL, C, Matlab, Java; Tools: AWS, Agile, Docker, Azure,Figma, Microsoft Office Suite (Excel) ... - Jan 15
Software Engineer
Seattle, WA
Resume Edward Hodapp Sammamish, WA email: ad2rmq@r.postjobfree.com phone: 425-***-**** Experience Summary: Languages: C, C++, Python, Java, Javascript, Perl, Tcl, Verilog Operating Systems: Linux, FreeBSD, Win16, Win32, WinCE, VxWorks, Segger embOS ... - Jan 14
Resume Edward Hodapp Sammamish, WA email: ad2rmq@r.postjobfree.com phone: 425-***-**** Experience Summary: Languages: C, C++, Python, Java, Javascript, Perl, Tcl, Verilog Operating Systems: Linux, FreeBSD, Win16, Win32, WinCE, VxWorks, Segger embOS ... - Jan 14