| Resume alert | Resumes 81 - 90 of 2012 |
Electrical Engineer, FPGA and PC Board Design
Boulder, CO
... david.fatzer@gmailcom Embedded design engineer focused on FPGA/RTL/SoC and schematic/PCB design. Bachelor’s degree in Electrical Engineering. Master’s degree in Computer Engineering. Principal Skills: RTL/SW Design FPGA RTL/SoC design. Xilinx, Intel ... - 2023 Sep 27
... david.fatzer@gmailcom Embedded design engineer focused on FPGA/RTL/SoC and schematic/PCB design. Bachelor’s degree in Electrical Engineering. Master’s degree in Computer Engineering. Principal Skills: RTL/SW Design FPGA RTL/SoC design. Xilinx, Intel ... - 2023 Sep 27
C C++ Verification Engineer
Albuquerque, NM
... System Verilog Design and Verification of 8237A DMA Controller Apr 2022 – Jun 2022 • Developed RTL Design for the DMA controller in the single transfer mode and simulator to interface it with CPU and memory module. • Designed verification plan and ... - 2023 Sep 22
... System Verilog Design and Verification of 8237A DMA Controller Apr 2022 – Jun 2022 • Developed RTL Design for the DMA controller in the single transfer mode and simulator to interface it with CPU and memory module. • Designed verification plan and ... - 2023 Sep 22
C++ Verification Engineer
San Mateo, CA
... 5+ years of experience in RTL design and Verification. 3+ years of Pre-SI verification work using a validation methodology UVM with SOC /IP development. Project Experience 1.Senior Verification Engineer, February 2022 to September 2022 UST Global, ... - 2023 Sep 21
... 5+ years of experience in RTL design and Verification. 3+ years of Pre-SI verification work using a validation methodology UVM with SOC /IP development. Project Experience 1.Senior Verification Engineer, February 2022 to September 2022 UST Global, ... - 2023 Sep 21
First Class Front End
Hyderabad, Telangana, India
... RTL Design using VHDL/Verilog. Synthesis and Simulation using Xilinx ISE, Vivado & Modelsim. RTL development, resolving system level challenges, architecting, implementing, and documenting using Verilog/VHDL concepts. The programming of FPGAs ... - 2023 Sep 19
... RTL Design using VHDL/Verilog. Synthesis and Simulation using Xilinx ISE, Vivado & Modelsim. RTL development, resolving system level challenges, architecting, implementing, and documenting using Verilog/VHDL concepts. The programming of FPGAs ... - 2023 Sep 19
Security Officer Assistant Manager
Harrisburg, PA
... Allied Universal Harrisburg, PA SECURITY OFFICER 03/2022 - 11/2022 Secure Job Stes Roving Patrols,Passdown Logs Near Miss Reports Key Pass Down Logs Check RTL Inbond & Outbound Containers Check Inbound & Outbound Employees Wand & Bag Check Making ... - 2023 Sep 15
... Allied Universal Harrisburg, PA SECURITY OFFICER 03/2022 - 11/2022 Secure Job Stes Roving Patrols,Passdown Logs Near Miss Reports Key Pass Down Logs Check RTL Inbond & Outbound Containers Check Inbound & Outbound Employees Wand & Bag Check Making ... - 2023 Sep 15
Control Systems Fpga Design
Visakhapatnam, Andhra Pradesh, India
... Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx Vivado Projects (using Verilog and implemented in FPGA) 4 ... - 2023 Sep 11
... Areas of interest Technical Skills: Digital Circuits,Verilog Verilog,Cadence,C,Ptyhon(basics) ASIC, FPGA, Cadence(RTL-GDS) Simulation Software: Cadence Virtuoso, TopSpice, Xilinx Vivado Projects (using Verilog and implemented in FPGA) 4 ... - 2023 Sep 11
Design Engineer Asic
Garden Grove, CA
... SKILLS Ability to quickly pick up new concepts and contribute with innovative solutions Strong Digital Logic Design background with ability to do RTL Design in VHDL and Verilog Verilog, VHDL synthesis System Modeling and Simulation testing ... - 2023 Sep 03
... SKILLS Ability to quickly pick up new concepts and contribute with innovative solutions Strong Digital Logic Design background with ability to do RTL Design in VHDL and Verilog Verilog, VHDL synthesis System Modeling and Simulation testing ... - 2023 Sep 03
Senior QA Automation Engineer Selenium C#
Plano, TX, 75074
... ● Functional Testing and Localization testing of CRM applications in 44 languages (includes RTL also). ● Testing new features in various configurations of OS and MS office which includes MAC Mini and MS Outlook. ● MS Dynamics CRM Mobile application ... - 2023 Aug 24
... ● Functional Testing and Localization testing of CRM applications in 44 languages (includes RTL also). ● Testing new features in various configurations of OS and MS office which includes MAC Mini and MS Outlook. ● MS Dynamics CRM Mobile application ... - 2023 Aug 24
Remote Software Intern
Boston, MA
... SKILLS ●Java, JavaFX, Python, Typescript, React, CSS, C, C++, R, Assembly, MATLAB, and Verilog ●Software development, Agile Methodology ●Network Engineering ●RTL circuit/Basic FPGA programming - 2023 Aug 17
... SKILLS ●Java, JavaFX, Python, Typescript, React, CSS, C, C++, R, Assembly, MATLAB, and Verilog ●Software development, Agile Methodology ●Network Engineering ●RTL circuit/Basic FPGA programming - 2023 Aug 17
ASIC/SOC Architect/Lead
Livermore, CA
... Cell: 510-***-**** adyynp@r.postjobfree.com https://www.linkedin.com/in/mabbas72/ Summary of Exeprience: Technical Leadership: •Led tape-outs across multiple process nodes (5nm, 7nm, 10nm, 14nm, 16nm, and 20nm) overseeing designs from RTL to GDSII. ... - 2023 Aug 15
... Cell: 510-***-**** adyynp@r.postjobfree.com https://www.linkedin.com/in/mabbas72/ Summary of Exeprience: Technical Leadership: •Led tape-outs across multiple process nodes (5nm, 7nm, 10nm, 14nm, 16nm, and 20nm) overseeing designs from RTL to GDSII. ... - 2023 Aug 15