| Resume alert | Resumes 41 - 50 of 2011 |
1 0 Cleaning Technician
Kearns, UT, 84118
... } [dir="rtl"] #upsellBannerForPad iframe, [dir="rtl"] #upsellBannerForPhone iframe { padding: 0px 28px 20px; } #upsellBannerForPad button, #upsellBannerForPhone button { min-width: 1px; height: 32px; margin: 0px; padding: 0px; color: rgb(0, 0, 0); ... - Jan 18
... } [dir="rtl"] #upsellBannerForPad iframe, [dir="rtl"] #upsellBannerForPhone iframe { padding: 0px 28px 20px; } #upsellBannerForPad button, #upsellBannerForPhone button { min-width: 1px; height: 32px; margin: 0px; padding: 0px; color: rgb(0, 0, 0); ... - Jan 18
Team Lead Product Designer
Lake Arrowhead, CA
... ● Led the design effort on localizing our app internationally accommodating 4 languages including Arabic RTL support. ● Led design effort in creating an atomic based design system and gaining buy-in from stakeholders to achieve engineering parody. ... - Jan 17
... ● Led the design effort on localizing our app internationally accommodating 4 languages including Arabic RTL support. ● Led design effort in creating an atomic based design system and gaining buy-in from stakeholders to achieve engineering parody. ... - Jan 17
Electronics Engineer: Fpga/Asic/Soc/Pcb/Mcu/Cpu
Greensboro, NC
Nidhi Gupta FPGA Engineer Scrum Master ad2unl@r.postjobfree.com, +1-336-***-**** LinkedIn Profile: https://www.linkedin.com/in/masters-electronics-guptanidhi/ Current Focus: IP based complex designs, RTL, Simulation, Testbench, Timing Closure ... - Jan 17
Nidhi Gupta FPGA Engineer Scrum Master ad2unl@r.postjobfree.com, +1-336-***-**** LinkedIn Profile: https://www.linkedin.com/in/masters-electronics-guptanidhi/ Current Focus: IP based complex designs, RTL, Simulation, Testbench, Timing Closure ... - Jan 17
Research Intern
New Brunswick, NJ
... E-Infochips-An ARROW Company June 2022 – July 2022 Intern Remote • Used the software OpenROAD to convert RTL (Resistor Tranfer Logic) designs into GDS-II (Graphic Data Stream) format, which is used for chip fabrication. • OpenROAD is an open-source ... - Jan 15
... E-Infochips-An ARROW Company June 2022 – July 2022 Intern Remote • Used the software OpenROAD to convert RTL (Resistor Tranfer Logic) designs into GDS-II (Graphic Data Stream) format, which is used for chip fabrication. • OpenROAD is an open-source ... - Jan 15
FPGA and Asic Design Engineer
Oceanside, CA
... Expert in high speed, high density FPGA design and development, SoC and ASIC design, simulation, verification, RTL development and synthesis, Xilinx (AMD) and Altera (Intel) FPGA tools, platforms and technologies. Experience with ZYNQ UltraScale+ ... - Jan 12
... Expert in high speed, high density FPGA design and development, SoC and ASIC design, simulation, verification, RTL development and synthesis, Xilinx (AMD) and Altera (Intel) FPGA tools, platforms and technologies. Experience with ZYNQ UltraScale+ ... - Jan 12
Java Developer C C++
Alpharetta, GA
... • Micro Architecture Development and RTL designed in Verilog. • Designed on Vertex 6 FPGA board using Chip scope analyzer tool. • Involved in device driver development for PCI express. Tools Used: Xilinx ISE, MATLAB and Chip scope analyzer. Language ... - Jan 11
... • Micro Architecture Development and RTL designed in Verilog. • Designed on Vertex 6 FPGA board using Chip scope analyzer tool. • Involved in device driver development for PCI express. Tools Used: Xilinx ISE, MATLAB and Chip scope analyzer. Language ... - Jan 11
Electrical Engineering System Design
San Jose, CA, 95126
... Obtaining RTL schematic and waveforms of various circuits and gaining familiarity with the tool usage. Gained knowledge on designing of AHB-APB bridge, its specifications & architecture. Obtained an overall picture of integration of different IP’s. ... - Jan 10
... Obtaining RTL schematic and waveforms of various circuits and gaining familiarity with the tool usage. Gained knowledge on designing of AHB-APB bridge, its specifications & architecture. Obtained an overall picture of integration of different IP’s. ... - Jan 10
User Experience Software Development
St. Louis, MO
... end Technologies Java, Springboot Version Controle GIT, BitBucket Database MongoDB Testing Tools Jest, RTL Web Technologies Micro Frontends, JavaScript (ES5 & ES6), ReactJs, Redux, Material UI, ReactBootstrap, HTML5, CSS3, SCSS, Bootstrap, JSON. ... - Jan 09
... end Technologies Java, Springboot Version Controle GIT, BitBucket Database MongoDB Testing Tools Jest, RTL Web Technologies Micro Frontends, JavaScript (ES5 & ES6), ReactJs, Redux, Material UI, ReactBootstrap, HTML5, CSS3, SCSS, Bootstrap, JSON. ... - Jan 09
Senior Software Engineer
Bellingham, WA
... Wrote a user story to apply the demo approach throughout the application, implement Vue component format changes for RTL languages, detect locale and user language settings. Documented project and research materials for reference during ... - Jan 07
... Wrote a user story to apply the demo approach throughout the application, implement Vue component format changes for RTL languages, detect locale and user language settings. Documented project and research materials for reference during ... - Jan 07
Frontend Developer
Lutz, FL
... • Championed rigorous testing practices for the Return Item Viewer, achieving 80% test coverage with RTL, Jest, Enzyme, and Cypress, exceeding company standards and minimizing future software regressions. • Delivered impactful features for a React ... - Jan 05
... • Championed rigorous testing practices for the Return Item Viewer, achieving 80% test coverage with RTL, Jest, Enzyme, and Cypress, exceeding company standards and minimizing future software regressions. • Delivered impactful features for a React ... - Jan 05