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Engineer Training

Location:
Milpitas, CA, 95035
Salary:
open
Posted:
November 15, 2010

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Resume:

Carmelo Camero Home: 408-***-****

**** ******* ***. ******: n/A

Milpitas CA 95035 E-mail: zcs9fn@r.postjobfree.com

Objective: challenging position in the field of semiconductor Reliability/ Failure Analysis.

Key Responsibilities

-Managed new product qualification of new analog digital and mixed signal IC s for major automotive hard disk telecom PC and consumer markets including FMEA and MTBF.

-Failure Analysis of qualification and customer failures utilizing state of the art equipment.

-Interface with external customers and internal Design / Product/ Test Engineers.

-Train lower level Engineers and Technicians as necessary.

Key Skills

-Strong ability to manage multiple complicated programs simultaneously.

-Ability to provide management with accurate estimates of project time and expenses.

-Talent and experience across a broad spectrum of Product Design wafer fabrication assembly test and Rel/ FA tasks allow turnkey QA/ reliability project management from initial FMEA to qual planning to Rel hardware design and manufacture thru qualification testing to qual reject failure analysis and final report generation and MFBF calculations.

Background and Skill/Qualifications

-15+ years experience as IC Reliability and Failure Analysis Engineering

-Excellent communication skills to customer and interface under pressure.

-Motivated to continually increase personal capabilities and learn skills.

Work Experience

Company : ICE Incorporated

2310 Lundy Ave. San jose CA 95131 Tel.no.: 408-***-****

Position: Failure Analysis Engineer

Date: May 2007 to August 2008

Job Description:

Performed device failure analysis to both established and startup Silicon Valley IC manufacturers of failed units from new product qualifications ESD and Latch-up test failures final test yield rejects burn-in and environmental test failures and field failures from customers.

Identify the root cause of failures (through knowledge of semiconductor processes IC design and production testing data). Perform physical services including cross section and de-processing with sample preparation tools and imaging equipments including RIE lapping tools jet etcher decapsulator SEM FIB CSAM Real-time X-ray and electrical isolation tools high and low power microscope and digital cameras. Compiled reports interpret data for the internal/external requestors within the preset time frame. Supervise and conduct training new hires if necessary.

Company : Micrel Corporation

2180 Fortune Dr. San Jose CA 95131 Tel no.: 408-***-****

Position: Reliability Engineer

Date: March 2002 to September 2005

Job Description:

-Reliability Engineer for internal new product qualifications and process quals. Coordinated testing and work with internal test floor for support of reliability projects (eg. Life testing HAST ESD/Latch-up etc). Analyzed failure data and furnished reliability test reports; procurement of Burn-in / Hast testing circuit boards including checking preliminary blue prints of circuit design for PCB layout approval. Hands-on on all reliability stress testing if necessary to expedite stress qualification to meet customer schedules and specifications.

Company : Cypress Semiconductor / IMI Corp.

198 Champion Ct. Santa Clara CA 95134-1599

Position: Failure Analysis / Reliability Engineer

Date: June 1998 to March 2002

Job Description:

-Perform and manage all device qualifications request and furnish final reliability test reports to internal and external customers.

-Perform device failure analysis for new product product qualifications wafer sorting burn-in and final test failures and customer returns. Identify the root cause of failures (through knowledge of semiconductor processes IC design and production testing data). Perform physical services including cross section and de-processing with sample preparation tools and imaging equipments. (RIE lapping tools jet etcher high and low power microscope digital camera etc). Compiled reports interpret data for the internal /external requestors within the preset time frame. Hands on experience in failure analysis equipment such as SEM RIE lapping tools CSAM Real-time X-ray and electrical isolation tools etc.

Company : Exar Corporation

48720 Kato Rd. Fremont CA 94538 Tel.no.: 510-***-****

Position: Senior Reliability/Failure Analysis Technician promoted to Reliability Engineer

then SustainingTest Engineer.

Date: September 1988 to June 1998

Job Description:

-Developed qual plans for new product wafer fab or assembly process qualifications. Determine acceleration factors coordinate testing and work with internal test floor. Analyze failure data and furnish reliability test report. In-charge of procurement of Burn-in / Hast testing circuit boards including checking preliminary blue prints of circuit design for approval and in-house Reliability equipment calibration. Hands-on on all reliability stress testing if necessary to expedite stress qualification to meet customer schedules and specifications. Perform physical services including cross section and de-processing with sample preparation tools and imaging equipments. (RIE SEM lapping tools jet etcher high and low power microscope digital camera etc). Teradyne and Sentry tester experience.

Education

UC Berkeley Extension----------courses taken: Semiconductor & CMOS Technology

Mission College--------------------------Associate of Arts in Microcomputer Technology

Polytechnic University of the Philippines.-------2 years Bachelor of Business Education

MSoffice software knowledge and training

Chemical Safety training yearly

CPR and First-aid training

Teradyne and Sentry tester training

Supervisory I &d II training

Self-improvement seminars for motivation and learn to have a positive outlook towards life as a whole

Hands-on experience on Burn-in temp cycle thermal shock autoclave HAST 85C/85%RH chamber ball shear bond pull SEM CSAM ESD tester and Latch-up testing--------



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