Andres “Mike” Flores

512-***-**** cell

tekcif@r.postjobfree.com

**** ***** ****** ******* #**** Austin, TX 78728

Education & Training

April 1989 - Autocad training - Park Center Vo-tech, Brooklyn Park, Minnesota

July 1988 - Finesse MCM training - Harris, Rochester, New York

June 1988 - Mentor Boardstation - Mentor, Minneapolis, Minnesota

March 1988 - Edge/Opus training - Cadence, Arden Hills, Minnesota

February 1988 - Concept training - Valid, San Jose, California

January 1988 - Allegro training - Valid, Chelmsford, Massachusetts

June 1978 – Mechanical/Electrical Drafting - (1,220 hours) Twin Cities Occupational Industrial Center, Minneapolis, Minnesota

Other experience: Orcad, PADS, PCAD, Viewlogic Powerview, Gerbtool, & CAM350.

Employment

April 2010 to present: Atlas Van Lines/ACE Southwest - Austin, TX – Performed driver and moving furniture duties in the storage warehouse in and around the Austin, TX area and out of state.

January 2002 to March 2010: Brainfuse - New York, New York – Outside telemarketing sales of online home tutoring for grades K through 12 from employer’s targeted leads.

November 2001 to January 2002: ACDI - Frederick, Maryland - Cadence Allegro PCB layout of various types of printed circuit boards for service bureau customers in Windows NT environment, front end work on 3rd party netlists and Allegro library symbol development.

August 2001 to October 2001: Avant Technology - Austin, Texas - Cadence Allegro PCB design modifications of various memory modules in Windows 2000. Created schematics in Cadence Concept. Maintained Allegro & Concept libraries. Output artwork using CAM350.

April 2001 to August 2001: Newisys - Austin, Texas - Cadence Allegro PCB design in Windows 2000 of high-speed servers based on AMD 64 bit processors, using mixed smt & thru-hole multi-layer pcb design process. Maintained Allegro symbol library and assisted with Orcad schematic library development. Used the CCT autorouter on the first company design.

September 1999 to March 2001: Dell Computers - Austin, Texas - Cadence Allegro PCB design in Windows NT4.0 of high-speed mixed smt & thru-hole multi-layer motherboards, Rambus memory risers, vrm power supplies. Edited Viewlogic Powerview schematics & input 3rd party net lists into allegro designs. CCT Spectra autorouter & CAM350 post process.

September 1998 to September 1999: IBM - Research Triangle Park, North Carolina - Cadence Allegro PCB design in UNIX/Windows NT environment. Mixed SMT/thru-hole multi-layer high-speed processor boards for pc workstations. Input 3rd party netlists from Viewlogic Powerview. CCT autorouter.

April 1998 to September 1998: Xetel - Austin, Texas - PCB Design using Cadence Allegro in

UNIX/Windows NT environment, and PADS Perform in Windows NT environment for various service bureau customers. Cadence Concept schematic entry & library maintenance, Orcad schematic entry for Allegro 3rd party netlists. Allegro symbol library maintenance & system operator maintenance. ECAM gerber editing for RS274X output.

November 1997 to April 1998: Alcatel - Richardson, Texas - Cadence Allegro PCB design of multi-layer smt/through-hole boards for telecommunication applications in Unix environment. CCT autorouter, Cadence Concept schematic updates, library symbol definition.

ADI gerber checking.

June 1996 to November 1997: Sony Wireless Telecommunications - San Diego, California - Cadence Allegro PCB design of multi-layer smt/through-hole boards for CDMA phones. RF analog/digital designs, Cadence concept schematic library development in Sun Solaris Unix & Windows NT environment.

March 1996 to June 1996: Cadre III - Austin, Texas - PADS 2000 PCB design of multi-layer SMT/through-hole boards for various customers such as Motorola and Texas Instruments in windows environment. ECAM post processing.

December 1995 to March 1996: Loral Vought Systems - Grand Prairie, Texas - Cadence Allegro PCB design of multi-layer through-hole boards for ATACM's missile controls to various military standards. Cadence Concept editing and library development in Unix environment.

August 1995 to December 1995: IBM - Austin, Texas - Cadence Allegro PCB design of multi-layer SMT/through-hole boards for PC circuit boards. Cadence Concept editing and library development. CCT autorouter, Unix RISC 6000 environment.

June 1995 to August 1995: Loral Fairchild - Long Island, New York - Cadence Allegro PCB design of multi-layer SMT/through-hole boards for F14 color night vision system, using Sun SPARC platform. Orcad netlist input.

September 1993 to June 1995: IBM - Poughkeepsie, New York and Rochester, Minnesota - Cadence Allegro/Concept library development, SMT/through-hole flex circuit design, assisted engineers & designers with Allegro & Concept in Unix RISC 6000 environment. Cadence Allegro PCB design of SMT & through hole analog/digital boards for power supply of AS4000 mainframe computers. Designed copper substrate power supply MCM. Allegro/Concept library development, C-shell programming in Unix RISC 6000 environment, & CCT autorouter.

October 1986 to September 1993: Cardiac Pacemakers - St. Paul, Minnesota - Cadence Allegro MCM design of low temp co-fire hybrid circuits for implantable defibrillators, Concept & Composer schematic entry & library development. Gerbtool gerber editor for scaling and panelization. Cadence Edge & Opus IC design for CMOS ASIC's using standard cell library. Evaluated Mentor & PCAD as a replacement CAD system.

May 1980 to September 1986: CAD experience on Calma GDSII system:

Delco Electronics - Goleta, California - PCB SMT/through-hole multi-layer boards

VTC - Bloomington, Minnesota - Analog/Digital ASIC design 1.25 micron process

NCR Comten - St. Paul, Minnesota - PCB SMT/through-hole multi-layer boards

Control Data - St. Paul, Minnesota - Plant engineering HVAC/piping & office layout

July 1978 to May 1980: General Mills, Golden Valley, Minnesota - Electrical and mechanical drafting of parts and assemblies for food processing machines. PLC electrical panels, wiring lists, & machinery flow diagrams.

Contact this candidate