VLSI, Verilog, Advance digital design,Asic, Cmos physical design, VHDL
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|Name: Manish Kundu
Nationallity : Indian
Qualification: Post Graduate diploma in VLSI from CDAC ACTS securing A grade; Bachelor in Electronics and communication Engineering from Lovely Professional University securing 6.08 GPA;
Skills: VLSI, Verilog, Advance digital design,Asic, Cmos physical design, VHDL, CPLD boards;
Tools familier with: KEIL, PROTEUS 7.1, ISE9.2-XILINX, MODEL- SIM, RIVIERA-PRO, LEONARDO-SPECTRUM,
MICROWIND (CMOS LAYOUT DESIGNING), ALTIUM (PCB), PCB WIZARD, EXPRESS PCB, CADENCE VIRTUOSO and NC Sim, Electronic Workbench.
1. LCD INTERFACING WITH CPLD XC9572 and FPGA SPARTAN 3E
2. RTC INTERFACING WITH CPLD XC9572 and FPGA SPARTAN 3E
3. STEPPER MOTOR INTERFACING WITH CPLD XC9572
4. I2C Bus Protocol (Major Project)
5. FIFO (code + layout)
6. CPLD board (kit)(Xilinx XC9572).
7. Basic idea behind FPGA Spartan 3S kit.
8. SPRAM and DPRAM using bidirectional line(code + task based test bench)
MAJOR PROJECT (CDAC):
I2C(INTER INTEGRATED CIRCUIT) BUS CONTROLLER
I C (pronounced I-squared-C) created by Philips Semiconductors and commonly written as 'I2C' stands for Inter-Integrated Circuit and allows communication of data between I2C devices over two wires. It sends information serially using one line for data (SDA) and one for clock (SCL).
I2C basic command sequence.
• 1. Send the START bit (S).
• 2. Send the slave address (ADDR).
• 3. Send the Read(R)-1 / Write(W)-0 bit.
• 4. Wait for/Send an acknowledge bit (A).
• 5. Send/Receive the data byte (8 bits) (DATA).
• 6. Expect/Send acknowledge bit (A).
• 7. Send the STOP bit (P).
nc resumes in Jalandhar, PB, India
design resumes in Jalandhar, PB, India
project resumes in Jalandhar, PB, India
test resumes in Jalandhar, PB, India
physical resumes in Jalandhar, PB, India
digital design resumes
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