RESUME

Ashish Shukla

Objective

To seek a challenging career as hardware design and test Engineer.

Education

Master of Science in Electrical Engineering

University of Hawaii at Manoa graduated: 01/2008

Bachelor of Engineering in Electronics and Design Technology

Nagpur University graduated: 08/2003

Technical Skills

•C,C++, Verilog, VHDL, Perl and Tcl

•MATLAB and Simulink, PSPICE, SwitcherCAD, Synopsis-Scirocco, Design Compiler

•Familiarity with WCDMA, CDMA, Ethernet Technology

•ModelSim, Xilinx ISE and Systems generator, Zealand IE3D

•UNIX (Solaris, HP), Linux, Windows

•Familiarity with MSSQL and Oracle

•Testing tools: Mercury interactive’s Loadrunner, QTP and Quality Center

Publication(s)

•Ashish Shukla and Luca Macchiarulo, "FPGA Based ECG Analysis System", Proceedings of the Sixth IASTED International Conference on Biomedical Engineering, Pg 68-72, Innsbruck, Austria, February 13-15, 2008.

Relevant Experience

•FPGA Implementation of a real-time ECG Analysis Algorithm 01/07-01/08

Designed and implemented a real time ECG Analysis system on FPGA. The FPGA based module was an integral part of a project on the use of Doppler radar in biomedical applications. Tasks performed include:

•Software implementation of the signal processing algorithm for the application

•Programmed and simulated the algorithm in MATLAB

•Tested the algorithm on a variety of data records and test cases

•Optimized the algorithm for better accuracy in peak detection

•Converted the software implementation of the design into hardware

•Described RTL based design for the functional requirement of the algorithm in VHDL

•Wrote test benches and carried out simulation

•Implemented filtering stages and introduced VHDL modules in Xilinx system generator environment

•Performed static timing analysis (STA) and synthesis of the design and optimized it for minimum area utilization in the FPGA

•Performed Hardware-in-the-loop simulation and testing with test vectors

•Successfully tested the design in real time

•Suggested and added a complex functionality in the design for increased accuracy and optimized the design for minimum resource usage.

Tools Used: MATLAB and Simulink, Modelsim, Xilinx ISE, Xilinx System Generator, Xilinx Spartan 3E starter kit

•Lab Technician

University of Hawaii 01/07-01/08

Worked as a Lab technician at the Instrument design lab with the Department of Physics. Assisted Lab Engineer in FPGA prototyping and board setup. Projects implemented include:

•Serial cable(RS 232) interface design

Designed the transmitter and receiver sections for the serial interface (UART) on a FPGA. The design was tested by passing 32 bit data through the on-board GPIO ports at a standard baud rate of 115200.

•High speed 10base-T Ethernet interface design

Implemented Ethernet full duplex protocol on a Xilinx FPGA board. The 10base-T interface provided basic MAC functionality and PHY services and was used to establish data transfer between the PC and the firmware connected to a high speed laser through the FPGA.

Tools Used: Xilinx ISE webpack, Modelsim, Oscilloscope and Logic Analyzer

•ASIC design - On-chip asynchronous communication scheme 08/06-12/06

Designed a GALS (globally asynchronous locally synchronous) communication scheme for a prototype Network-on-chip application. Major task involved synchronizing the data latching between multiple clock domains. Model designed, simulated in VHDL and tested successfully with a basic 8-bit adder application. Synthesis performed using design compiler.

Tools Used: Modelsim, Scirocco and Design Compiler by Synopsys

•ASIC design - Instruction Accurate RISC CPU 08/06-12/06

Designed a reduced instruction set (RISC) CPU for a prototype mobile phone application. Implemented the design in VHDL and tested it with 6 instructions based on different addressing modes for 32 bit data. Design successfully simulated and later synthesized.

Tools Used: Modelsim, Scirocco and Design Compiler by Synopsys.

•Design Engineer

Hoist Elevators (India) Pvt. Ltd, Nagpur, India 05/03-07/04

Initially worked as an intern with for three months and later hired as a full time employee. Responsibilities included

•Design and prototype control panel circuitry and test the entire firmware to be integrated into the elevators.

•Oversee commissioning and implement testing and inspection procedures to ensure safety during normal operation for new elevators.

•Senior Programmer QA Analyst

AMS LLC Fairfax, VA 01/08-Present

Worked as a Senior QA Programmer Analyst on various projects ranging from Regression to System Testing of both Multi-tier and Client/Server Applications.

Responsibilities

•Gathered and analyzed user/business requirements and developed System test plans

•Performed both Manual and Automated Testing

•Involved in writing and implementation of Test Plan, Test Cases and Test Scripts.

•Managed project using Quality Center, added test categories and test details

•Created test scripts using QTP.

•Performed test case execution manually to verify the expected results.

•Used QTP to conduct Data Driven Testing by pulling out data from data tables.

•Performance, Stress and Load testing using LoadRunner

•Identified bottlenecks using online monitors and analyzing graphs using LoadRunner

•Involved in Regression Testing, Backend testing, Functionality and Security testing.

•Wrote SQL queries to check data integrity and created stored procedures and triggers

•Follow up with developers on defects status on a daily basis

Other Experience/Projects

•Teaching Assistant

University of Hawaii 01/06-01/08

•RF/Microwave - Microwave sensor for blood glucose monitoring 01/07-05/07

Designed and simulated a prototype non-invasive sensor for blood glucose monitoring of diabetic patients. The size of the spiral shaped radiating element of the sensor was less than 40 mm and had an operating frequency between 0.5 – 2.5 GHz.

Tools Used: MATLAB and IE3D by Zealand software

•RF and EMI-Ray tracing model for improved radio wave propagation prediction

Simulated a ray tracing model for predicting the amount of electromagnetic energy transfer from a source to a target location for a prototype urban environment setting based on Manhattan architecture. Simulation performed for all the cases involving reflection, refraction and diffraction of the radio waves along their path before reaching the target.

Tools Used: MATLAB and Simulink

Additional Information

•Attended workshop by Xilinx Corp. on DSP design flow and porting of DSP applications using System Generator

•Experience in FPGA and ASIC design/development

•Experience writing and debugging VHDL code, prototype designing, Synthesis, Placement and Routing, Timing Closure, Debugging and handling multiple clock domain issues and Verilog to VHDL code conversion.

•Extensive experience with CAD tools like Xilinx tools ISE, System Generator (DSP design), Modelsim, Synopsys tools Scirocco (simulator) and Design Compiler (synthesis), MATLAB and Simulink

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