James Y. Yap

Address: *-**** ****** ****** ***. #: 604-***-****

Burnaby, BC, V5E 1H3 E-mail: ne7ezr@r.postjobfree.com

OBJECTIVE: To contribute my skills and work experience for technology advancement.

PROFILE: I am a Semiconductor packaging and Electronics Assembly specialist with 14 years work experience in high volume manufacturing, process, quality and reliability Engineering of IC packages for the top OSAT (Out-sourced assembly and test) companies in the world, Amkor Technology and Siliconware Precision Industries, now currently working for Canada’s 2nd largest EMS (Electronics Manufacturing Services) – Creation Technologies.

My strengths include excellent leadership and communication skills, an efficient problem analyst and solver, assertive, highly fast-paced, can easily adapt to any type of work environment, decisive, and innovative in improvising systematic methods for complex tasks.

WORK EXPERIENCE

PROCESS ENGINEER Dec 2006 – Present

Creation Technologies URL: http://www.creationtech.com

- Process engineering of SMT, PTH and final assembly in electronics manufacturing

- Statistical process control, optimization and yield management from NPI to mass production

- Prototype manufacturing design of cutting edge industrial, medical and military electronics

- PCBA DFM specialist (Design for Manufacturability), Implementation of Lean manufacturing

- Maintenance Supervisor of Maintenance technicians for manufacturing equipment

SOME OF MY ACCOMPLISHMENTS:

- Pioneered PiP (Pin-in-Paste) intrusive reflow process and authored its design rules – merging of SMT and PTH process in 11 sites of Creation Technologies

- Generated Mixed Technology (Lead Free and Eutectic Sn/Pb) reflow profiling guidelines

- Developed DFM standards for solder print stencil design

SENIOR FAILURE ANALYSIS ENGINEER Jul 2002 – Sep 2006

SPIL - Siliconware Precision Industries Co. Ltd. URL: http://www.spil.com.tw

AWARDS: Exceptional Merit Award, Mediatek-Argus ODD Assembly Failure Analysis

Performance Merit Award, 2004, Marvell-Western Digital On-board Analysis

Exceptional Merit Award, July 2003, for LSI-Sony defect mapping.

- Technical Failure Analysis of advanced semiconductor IC packages - leadframes, BGAs, FlipChips, camera/memory modules, COFs and WLPs.

- Reliability characterization and qualification testing of new IC package technologies

- Reverse engineering of IC packages up to nanoscale structures

- Failure mode defect mapping, simulation and root-cause verification in assembly/test line

- Characterization of On-board / Functional Test failure mode to physical IC structural defect

- R&D of new Failure Analysis / Reliability / QC test technologies

SOME OF MY ACCOMPLISHMENTS:

- Developed FA methods for advanced ICs – multi-Stacked dice package and Flip-chip QFNs

- Established SAM standards for E-pads, wafer level CSPs and thin film adhesive packages

- First to establish IC FA System and Procedure flow in China through SPIL - Suzhou plant

QUALITY ENGINEER Sep 1997 – Mar 2002

Amkor Technology URL: http://www.amkor.com

AWARDS: Extra Mile Award, November 1999 for Outstanding Job Dedication

- Detection, failure analysis and problem solving of potential quality issues

- Defect mapping and failure mode correlation analysis with assembly / Test process

- Generate programs for quality, yield and cycle time continuous performance improvement

- Develop Process Control methods for stabilization of equipment process capability

- Monitor update of FMEA, Control Plan, Out-of-Control plan, TCM / SPC methods and Specs document system of assembly processes

- Spearhead and Validate 8D, Material Review Board (MRB), PSM, Position paper, and Design of Experiment Reports for Customer/Management Approval

- Internal Auditor - quality compliance for ISO, QS and SAC certification/surveillance audits

- Officer in Charge - APQP Team, Advanced Product Quality Planning. Qualification and quality planning team/ramp readiness of New Products - fleXBGA , SiP Modules, Striptest

SOME OF MY ACCOMPLISHMENTS

- Pioneered Strip-Testing Technology quality systems

- Developed 2nd and 3rd high magnification optical inspection spec criterion

- Devised Corrective action validation system through institutionalized validation paradigm

EDUCATION

BACHELOR OF SCIENCE DEGREE IN MECHANICAL ENGINEERING 1993 - 1997

De La Salle University

TECHNICAL TRAININGS

Juki Pick & Place KE-2070/2080 Programming, JUKI - Fremont, CA Jan 2011

Ekra Solder Paste Automated Inspection Programming Jul 2010

Lean Manufacturing, Creation Technologies Jan 2007

RTI Automated Optical Inspection Operations, Celestica Oct 2006

DEK Solder Printer Operations, Celestica Oct 2006

Siemens Siplace Pick & Place Operations, Celestica Oct 2006

Ion Beam Milling Advanced Techniques, BAL-TEC April 2006

Field Emission Scanning Electron Microscopy, JEOL Dec 2004

Advanced Failure Analysis Technology for Nanoscale, IPFA July 2004

Fine Pitch Scanning Acoustic Tomograph, HITACHI March 2004

Advanced EDX Surface Mapping, HORIBA Feb 2004

IMC Reliability Development for Fine Pitch Wirebonding, KULICKE AND SOFFA Sep 2003

Fused Ion Beam Sample Preparation, HITACHI May 2003

3D and Volumetric Multi-scanning Acoustic Tomograph Methods, SONIX July 2002

K&S 8028 Wirebonder Technical Training, KULICKE AND SOFFA April 2001

Design of Experiments (DOE), AMKOR P1 Sep 2000

Machine Process Capability Study (MPCpS). AMKOR P4 August 2000

Process Mapping, AMKOR P4 April 2000

Failure Mode and Defect Analysis (FMEA), AMKOR P3 March 2000

Xilinx Plant Level Specs Certified Nov 1999

Intel Assembly Site Specs 15-0027 Certified June 1999

LSI-Logic Plant Level Specs Certified May 1999

ISO 14001, AMKOR P3 March 1999

Total Productivity Management (TPM), AMKOR P3 January 1999

Quality Systems / Global 8-Discipline, AMKOR P3 January 1999

Statistical Process Control (SPC), AMKOR P3 January 1999

REFERENCES:

Bart Serrano - company customer

Operations Manager

Vaisala Inc.

Suite 100 - 13775 Commerce Parkway

Richmond, BC Canada V6V 2V4

Desk: +1-604-***-****

Cell: +1-604-***-****

Email: ne7ezr@r.postjobfree.com

Ed Nicolas, P. Eng - current boss

Process Engineering Manager

Creation Technologies BC

3939 North Fraser Way, Burnaby, BC

Desk: +1-604-***-****

Cell: +1-778-***-****

Email: ne7ezr@r.postjobfree.com

Ralph Merk - former boss

Engineering Manager

Point Grey Research

12051 Riverside Way

Richmond, BC, V6W 1K7

Desk: +1-604-***-****

Cell: +1-604-***-****

Email: ne7ezr@r.postjobfree.com

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