Post Job Free
Sign in

Motivated Semiconductor Researcher

Location:
Columbus, OH, 43201
Posted:
September 09, 2009

Contact this candidate

Resume:

PARAG BAXI

***, * *** ***, ********, OH-*****, U.S.A.

***-614-***-****

PROFILE

Objective: seeking a position within the Semiconductor Industry, possibly with an international perspective.

Availability: Available to join immediately. Open to Relocation.

EDUCATION

M.S. in Electrical and Computer Engineering (March 2009) GPA: 3.76/4.0

THE OHIO STATE UNIVERSITY, Columbus-Ohio, USA

B.E. in Electronics and Telecommunication Engineering (June 2006)

ST. FRANCIS INSTITUTE OF TECHNOLOGY, Mumbai, India

CERTIFICATE COURSES

SPC (Statistical Process Control)

DOE (Design of Experiments)

Successfully completed ASQ (American Society for Quality) certified training on SPC and DOE.

Both courses equivalent to 3 ASQ RUs (Recertification units) for Six SigmCertification.

ACADEMIC PROJECTS

Violet Solar Cell Fabrication Laboratory Design

January to March, 2009

Developed a detailed procedure for the cleanroom fabrication of the ‘violet’ solar cell.

Included complete recipe for each step. Monitor and test structures wafers included in design.

Designed photo masks including mask for top metal contact pattern.

Divided procedure into weekly schedule based on available Cleanroom resources.

Study on theory and design of GaN HEMTs

January to March, 2009

Detailed study on theory of GaN based devices.

Design of a GaN HEMT for operation at 10GHz and 40% PAE amplifier.

MESFET Design Layout

January to March, 2008

Detailed study on theory of compound semiconductor devices.

Mask Layout design of a SAINT MESFET with PCM device, alignment markers and verniers using ADS.

IC Device Fabrication on Silicon Wafer

September to December, 2007

Introduction to basic Cleanroom fabrication techniques including Chemical Processes, Photolithography, Oxidation, Diffusion, Metallization and Device Characterization.

Devices fabricated: MOSFETs, Capacitors, Invertors, Diffused Resistors, p-n Diode and Test Structures.

Device testing and characterization done using CV and IV test stations.

Literature Review of Technologies for Nanowire Synthesis

September to December, 2007

Comprehensive literature study of Nanowire fabrication techniques.

Classification based on random or organized growth and metal, semiconductor, organic or inorganic material.

KEY SKILLS

Cleanroom Experience: Worked in a class 100 clean room. Ability to work with equipments used in semiconductor device manufacturing.

Coursework: Solid State Micro- Electronics Laboratory, Nanofabrication and Nanomanufacturing, Advanced Photo-Volatics, Compound Semiconductor Technology, Fundamentals of semiconductors and optoelectronics.

Languages: C and C#

Hardware: PC and MAC Assembly and Maintenance. MS OS Administration.

Applications: ADS, IE3D, ModelSim, Matlab, NEC-WIN, MS Word, PowerPoint, Excel, Adobe Audition, Photoshop.

WORK EXPERIENCE

Mumbai University, Mumbai-India

Teaching Assistant

February to May, 2007

Daily conducted 60 min technical lectures and lab sessions with audio visual material. Duties included grading of assignments and term-tests and keeping attendance records.

Ohio State University, Columbus-Ohio

Part time Job-Grader

March 2008 to March 2009

Grading of assignments & term tests.

PUBLICATION

K.Deodhar, P.Baxi, A.Naik, R.K.Gupta. Printed Annular Ring Monopole Antenna for UWB application.

IEEE International Conference on Portable Information Devices, 25-29 May 2007.

HONORS and ACTIVITIES

Won ‘BEST IDEA PRIZE’ at Mind’s Eye Inter College Project showcase at St. Francis Institute of Technology. (Jun 2006)

Won 1st prize in Robotics competition. (Apr 2003 SFIT)

Member IETE. (Jan 2005 – Mar 2006)

Volunteer work with Serving America First at Columbus, OH. (Aug 2007 - ongoing)



Contact this candidate