ISEN KURIAKOSE Email: acumo1@r.postjobfree.com

HARDWARE AND PCB LAYOUT DESIGN ENGINEER Phone: 91-720*******

PROFESSIONAL EXPERIENCE:

Total Experience : 1 Year 5 Months

Current Employer : Silicon Circuit Research Labs Pvt. Ltd., Bengaluru

Website : www.siliconresearchlabs.com

Designation : Hardware Design Engineer.

Duration : April 18 2016 to Till present.

Previous Employer : GreenMil International, Bengaluru

Website : www.greenmil.co.in

Designation : PCB Layout Design Engineer.

Duration : Nov 17 2014 to March 31 2016.

PCB LAYOUT EXPERTISE:

Maximum number of layers PCB routed:

8 layers

Main Memory interfaces routed.

DDR3

Maximum frequency Routed.

10 GHz

Number of PCBs involved.

20 boards

Specialization:

Knowledge in power supply layouts.

Power plane and Split Power plane designs

Isolation between different sections like analog, digital and power.

Experience in SMA Antenna Layout and via stitching techniques

PCI signal routing.

BGA, LGA, SMD based designs.

Knowledge in Back Drill technology in PCB.

Knowledge in Pin delay technology.

Experience in impedance matching layout.

Experience in re-engineering and re-works

Knowledge on Hardware design

Work Profile:

End to end Printed Circuit Board Layout Designing

Drawing schematics for all type of Electronic Circuit diagram.

Designing various boards as per IPC and MIL grade standards.

Designing of Single, Double & Multi-layer PCBs.

Designing Flex, Rigid-Flex PCBs

Interaction with client/hardware department

Defines the routing constraints and plan the layout by taking care of EMI, Crosstalk and reflections

Schematic Capture for PCB Design

High Speed PCB Layout ( Library Creation, Placement, Routing and Gerber file generation )

Constrain setting of PCB.

NC drill creation and verification.

Flash creation of through-hole components.

Placement, routing and gerber generation.

Verification of the layouts

Creating & Checking the Gerber & Plot files.

Quote process management for fabrication.

Interaction and management of post fabrication tests and assembly with the assembly department for manual or machine assembly.

PCB Layout Tools used:

Cadence Allegro 16.2, 16.3

OrCad capture

Cadence Concept HDL

Verification tool

Pentalogix ViewMate

Layout Design Tool – VLSI Custom Design

Cadence Virtuoso Spectre

Cadence Virtuoso Layout and Assura

PROJECTS

GSM Dual SIM Module PCB Design

Role: Schematic entry, designing all the footprints for GSM module components, placing and routing them to release Gerber file within the time allocated. Isolation of signal lines from other traces by using ground guarding techniques was carried out in this board design. Also the signal trace from the sim modules to the respective SMA connector was carried out by ground place stitching method. The signal trace from the SMA connector was tapered to reduce reflection losses.

Tools: Cadence Design Entry CIS, PAD Designer, OrCAD SPB 16.3, Pentalogix.

Design of HART Extension Board

Role: Schematic entry, designing of all the footprints of HART connector board, placing and routing them to release Gerber file within the time allocated.

Tools: Cadence Design Entry CIS, PAD Designer, OrCAD SPB 16.3, Pentalogix Gerber viewer

Printer extension testing board prototype

Role: Meetings with client at client location for precision board design, and procedures from footprint creation to Gerber file release.

Tools: Cadence Design Entry CIS, PAD Designer, OrCAD SPB 16.3

Prototype board – LDR Controller

Role: Designed a circuit for LDR controlled power supply using regulator and comparator devices. PCB designing of the same was carried out later. Procurement of components, both locally and online was done. Gerber released and sent for fabrication

Tools: Cadence Design Entry CIS, PAD Designer, OrCAD SPB 16.3, Pentalogix Gerber viewer

ECG control board

Role: Project Co-Ordinator

Part of the team for the design of the 6 layer ECG control 4cmX4cm board with a Bluetooth and sensors and carried out costing, planning and co-ordination of the design.

Designed the Flex patch for sensor accommodation from the main board edge connector

Tools: Cadence Design Entry CIS, PAD Designer, OrCAD SPB 16.3

HARDWARE DESIGN AND DESIGN ENVIRONMENT PROFICIENCY

Schematic Entry : Cadence Virtuoso, Virtuoso64, Design Entry CIS (OrCAD).

Layout Entry : Cadence Virtuoso Layout Editor, Cadence SPB 16.2. SPB 16.3

Simulators : Spectre, HSPICE, ADS, PCB SI, ModelSim, and Xilinx ISE.

Verification : Assura, VCS (Academic Version)

Synthesis : Synopsis DC, PrimeTime, and IC Compiler. (Academic Version)

LANGUAGES

HDL : Verilog.

HVL : System Verilog (Basics)

Programming : C, C++ (Basics).

Scripting : TCL (Understanding only)

STRENGTHS

Excellent interpersonal skills and good communication skills

Fast learner and Innovative thinking

Adaptive, Flexible with team environment, Sportive Sprit and Quick learner

Leadership skills

ACADEMIC PROFILE

2013 - MSc [Engg] – VLSI System Design, Coventry University UK, from M.S. Ramaiah School of Advanced Studies, Bangalore. ( GRADE – B-)

2011 – B. E. Electronics and Communication Engineering, VTU Belgavi, from Adichunchanagiri Institute of Technology, Chikamagalur. ( AGGR – 60)

2006 – 12th, C. B. S. E Delhi, Mahatma Gandhi Public School, Ernakulam. (PER – 66%)

2004 - 10th, C. B. S. E Delhi, St Peter’s Senior Secondary School, Ernakulam. (PER -79%)

PERSONAL INFORMATION

Date of birth : 22nd May, 1989

Age : 26 years

Gender : Male

Nationality : Indian

Father’s Name : K.V Kuriakose

Mother’s Name : Marykutty Kuriakose

Languages : English, Hindi, Malayalam, Kannada.

Hobbies and Interests : Drawing and painting, Playing Football, Reading.

Permanent Address : C-206, Rajarajeshwari Nivas,

Vajpayee Nagar, Bommanahally

Bengaluru, Karnataka

560068

Ph Mob : 91-720*******

DECLARATION

I hereby solemnly declare that the above-mentioned details are true to the best of my knowledge and I bear responsibility for the correctness of the particulars.

Place: Bengaluru

Date: 22-APR-2016 ISEN KURIAKOSE

Contact this candidate