NALINA REDDY

*** ****** ****, ******, ********, *8187

224-***-****

actgm5@r.postjobfree.com

OBJECTIVE:

To obtain a challenging position in a high quality engineering environment where my resourceful experience and academic skills will add value to organizational operations.

Experience:

Validation Engineer-V2V, DMS and FCM, Cresttek, LLC

Client- General Motors, Milford Proving Grounds, Michigan Sep 2014 -Present

Performing Electrical Hardware/Software Validation for Advanced Active Safety features such as lane Keeping Assist, cruise control, collision mitigation systems, and park assist using Vehicles.

ECU (Electronic Controls Unit) flashing and testing using DPS Tool.

Data Acquisition, Bus Monitoring and Diagnostics of ECU using Vehicle Spy Tool.

Managing electrical component validation status and submit reports.

Reviewing electrical component hardware and software design requirements.

Identifying non-compliance to standards and resolve the issues.

Creating/revising software test plans and procedures.

Executing test procedures to completion.

Following up with suppliers to validate and verify test procedures.

Graduate Assistant, California State University, Fullerton, California Sep 2013- May2014

Assisting students in lab.

Grading homework assignments/exams.

Lead discussion sessions.

Project Trainee, Ampere Power and Automation Technologies Ltd, India Oct 2011-Aug 2012

Provide technical key support, advice and services to clients.

Co-ordinate Customers and Business Development Managers for Electric supplies and tools.

Technical Support, International Business Machines, Bangalore, India July 2011-Oct 2011

Provide real time telephones support to customers.

Analyze and clarify customer queries through troubleshooting and researching existing knowledgebase articles/known issues.

Technical Skills:

Languages : C, C++, MATLAB, Embedded C, CAPL Scripting

Development Tools : MATLAB, Simulink

Automotive Diagnostic Tools : Vehicle Spy, DPS, Canalyzer and Canoe.Car2x

Operating System : Windows (All versions) and Linux

Office tools : Word, Excel, PowerPoint, Access

Project Details:

Front Camera Module

Performance testing of FCM, which implements image processing for Active safety features including Lane Departure warning, Forward Collision Alert, Automatic High Beam Assist, Lane Keep Assist and many more.

Vehicle to Vehicle Communications

Performance testing of V2X subsystem which allows over-air-communication with other V2X traffic participants (e.g. vehicles or roadside units equipped with a V2X system) which helps to prepare the driver to act accordingly.

Driver Monitoring Systems

Performance testing of Driver Monitoring Camera System which is capable of capturing an image and processing that image to determine driver’s attention state by assessing the driver’s head pose and eye state.

Academic Projects:

Bio-modal Biometrics by Fusion of Face and Fingerprint

Designed a Bimodal Biometric system for face and finger print recognition with high computation efficiency and rate aiming at practical implementation.

Mat lab scripting is being used for design development.

Discrete Wavelet Transform (DFT) and Fast Fourier Transform (FFT) theorem were being used.

MEMS based Real Time Control System

Designed and developed MEMS based real time control system

CPLD boards were used for external interface which controls any device in real time environment.

Wireless Sensor Network Based Monitoring System in Real Time Environment.

Designed and implemented a WSN based monitoring system for Fire Monitoring and Extinguishing.

A speech recording unit is used to play the message when the temperature crosses the threshold or when an intruder is detected.

A fire extinguisher kit is used to reduce the impact of fire accidents by extinguishing the fire automatically when detected.

A Low- Power Multiplier with the spurious Power Suppression Technique

A novel connection between digit-serial computing and skew tolerant domino circuit design is developed and applied to the design of unsigned and signed multipliers.

A multiplier having a digit size of bits is naturally and efficiently mapped into a skew-tolerant domino implementation using overlapping clock phases.

The simulation results show that a particular digit-serial multiplier constructed with skew-tolerant domino circuits is up to 41% faster than the corresponding design with traditional domino circuits.

Education:

Master of Science, Electrical Engineering May 2014

California State University, Fullerton, California (GPA-3.51)

Bachelor of Engineering, Electronics & Communication Engineering July 2011

Visveshwaraya Technology University, Bangalore, India (GPA-3.6)

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