EDA SAHIN

Phone: +1-408-***-****, Email: acsid8@r.postjobfree.com

Summary

Digital design engineer offering 6 years of experience on FPGA design and high speed electronic board design. As a permanent resident of United States, looking for job opportunities in U.S. Highlights

RTL design with VHDL, Verilog

MATLAB programming language

Xilinx ISE, EDK, SDK, ChipScope tools

Altera Quartus, Qsys, SignalTap Logic Analyzer tools

Mentor Graphics HDL Designer, ModelSim, Design Architect, Board Station, Hyperlynx tools

Hands on experience with lab equipments such as oscilloscopes, signal generators Experience

Senior Digital Design Engineer Jan 2009 to Current ASELSAN Inc. Ankara, Turkey

Worked on electro-optical imaging and targeting systems and generally dealt with image, video processing algorithms.

Owned full-cycle development of FPGAs including implementation, functional and gate level simulation, synthesis, static timing analysis, board level integration.

Implemented communication interfaces such as UART, I2C on FPGAs.

Designed multiport interfaces for Altera DDR SDRAM controller, Altera Ethernet MAC and Xilinx Aurora IPs.

Gained experience on high speed electronic board design including schematic and PCB layout design.

High speed transceivers SFP and XFP are used and high speed interfaces DDR3, XAUI, XFI and SFI are experienced.

AVCI Helmet Integrated Cueing System (HICS) Project o Designed Active Matrix LCD driver for head-mounted display on Altera Cyclone III. o Implemented blob detection algorithm from a real-time video on Altera Stratix III. o Designed video standard converter between Camera Link, ARINC818 and DVI on Altera Cyclone III.

ASELPOD Advanced Targeting Pod Project

o Designed fiber optics interface circuit board which contains Xilinx Spartan-3 FPGA, LPDDR2 SDRAM, Camera Link receivers, clock generators, SFP and XFP fiber optics interfaces.

o Carried out the RTL design of Xilinx Spartan-6 FPGA which is a video multiplexer from digital video sources to XAUI.

Common Aperture Targeting System (CATS) Project

o Designed sensors interface circuit board which contains Cyclone V FPGA, LVDS, RS422 transceivers, DDR3 SDRAM and XFP fiber optics interfaces.

OZGUR Mission Computer-Avionic Suite Project

o Defined and documented the requirements of DO-254 compliant I2C interface and carried out the design.

o Designed video capture block for analog video standards NTSC, PAL on Altera Stratix V. Intern, Laboratory of High Resolution EEG Jun 2008 to Sep 2008 University of Rome "Sapienza" Rome, Italy

Developed MATLAB codes for modeling EEG signals. Intern, Avionics Department Jul 2007 to Aug 2007

TAI (Turkish Aerospace Industries) Inc. Ankara, Turkey

Worked on Microchip PIC programming with Assembly. Education

Master of Science, Electrical & Electronics Engineering 2013 Middle East Technical University Ankara, Turkey

GPA: 3.21 / 4.00

Major: Computers

Courses: Pattern Recognition, Machine Vision, Image Processing, Video Processing Thesis: Road extraction from satellite images by self-supervised classification and perceptual grouping Bachelor of Science, Electrical & Electronics Engineering 2009 Middle East Technical University Ankara, Turkey

GPA: 3.62 / 4.00

Major: Computers, Minor: Biomedical

Courses: Circuit Theory, Digital/Analog Electronics, Logic Design, Computer Architecture, Data Structures, Microprocessors, Operating Systems

Accomplishments

2009-2011, TUBITAK (The Scientific and Technological Research Council) National Graduate Fellowship (Comparable to NSF Graduate Fellowship)

2008, Erasmus Scholarship for Summer Practice

2008, Ranked in the top 0.1% in Turkish Graduate Study Exam

2004-2009, Sabanci Foundation Achievement Grant

2004, Ranked in the top 0.05% in Turkish University Entrance Exam Publications

Sahin, E. and Ulusoy, I. Road extraction from satellite images by self-supervised classification and perceptual grouping, Proc. SPIE Image and Signal Processing for Remote Sensing XIX, Dresden, 2013 Certifications

Sept 2014, RTCA / DO-254 Design Assurance for Electronic Hardware by FAA consultant DER

Jun 2014, Introduction to UVM by Leading Edge Ltd.

May 2014, System Verilog for Verification by Leading Edge Ltd.

Dec 2011, Expert VHDL by Doulos Ltd.

Jul 2011, Comprehensive VHDL by Doulos Ltd.

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