MOUNIKA DUBBAKA
CONTACT INFORMATION
H-No: *-**/11 H, V.V.Nagar Colony, E-mail:acrzqz@r.postjobfree.com
Mubaraknagar, Mobile: +91-994**-*****
Nizamabad-503002,
Andhra Pradesh, India.
EDUCATION
1. Bachelor of Technology (B-Tech), Electronics and Communica-
tion Engineering (ECE)
Vardhaman College of Engineering, Affiliated to Jawaharlal Nehru
Technological University (JNTU-H) Hyderabad, India, 2014 (expected) 78.6%
2. +2 Intermediate Public Examination (IPE), 2010 91.3%
3. Secondary School of Certificate (SSC), 2008 91.6%
TECHNICAL SKILLS
1. Programming Languages: C, JAVA
2. Hardware Description Languages: Verilog
2. Operating Systems: Windows, Linux
3. Assembly Programming: MASM, Keil software for microcontrollers
4. Scripting Languages: Perl, Tcl (Linux shell scripting)
5. Tools: MATLAB, Multisim, Cadence - NC, Spectre, Virtuoso ADE, Assura, Encounter RTL Compiler, SOC Encounter
CERTIFICATIONS
1. Certified in Physical design through Cadence VLSI Certification Program (CVCP)
PROJECTS
1. Advance Peripheral Bus (APB) based Serial Peripheral InterFace (SPI) Protocol SOC .
Team Size: 4
My Role: Designed ABP block and verified synthesis
Project Description: APB is a bus in Advanced Microcontroller Bus Architecture used in smart phones. SPI is an interface for connecting low speed peripherals. The design was described using Verilog and synthesised using RTL compiler. Finally floor planning, placement and routing are done to get a flat design.
2. Forward Error Correction (FEC) using Turbo Codes
Team Size: 4
My Role: Design of decoder
Project Description: Turbo Codes are most efficient codes used for error correction in noisy channels. Turbo encoder and decoder are designed. Convolutional encoder and interleaver are used in the encoder and SOVA algorithm is used for decoding.
3. Full custom implementation of 8-bit barrel shifter using 2:1 Multiplexers
Team Size: 1
Project Description: Barrel shifter is a digital circuit that can shift
n number of bits in a single clock cycle. 8-bit barrel shifter structure is designed by
using 32 2x1 multiplexers. Three different operations can be performed like left shift, right shift and rotate. Blocks of mux are created and instantiated in the designing of barrel shifter schematic and layout. Transient analysis is done order to verify the functionality.
4. Implementation of 32-bit floating point arithmetic operations using Verilog
Team Size: 4
My Role: Design of adder block and integrating various blocks
Project Description: A floating-point arithmetic is appropriate for high precision applications. It is represented by SEM (Sign(1), Exponent(8), Mantissa(23)). Thus any given number or result of any operation performed between two operands is represented in a frame of 32-bits which is in SEM format. The basic operations like addition, substraction, division and multiplication are performed. Algorithm is expressed in verilog and is simulated to verify the functionality.
HONOURS AND AWARDS
1. Received certificate of merit for being one among the top 7% of students
National wide in NIIT National Level IT Aptitude Test (NITAT on 12th
February, 2012.
2. Participated in poster presentation on `Solar energy conservation through
Nanotechnology' at ELAN-11 during 28-30th January 2011, Indian Institute of Technology
(IIT), Hyderabad.
3. Organised the event PAPERAPTUS at TECHNOLITES 2K10 on 11-12 October, 2010,
Vardhaman College of Engineering, Hyderabad.
4. One among the members of organising team for Satellite house at TECHNOLITES 2K10
during 11-12 October, 2010, Vardhaman College of Engineering, Hyderabad.
5. Volunteer, National Green Corps (NGC) in college.
6. Cadet, National Cadet Corps (NCC) in school.
PERSONAL PROFILE
Name: D.Mounika
Mother's Name: Anuradha
Father's Name: D.Narsimha Rao
Date of Birth: 11th July 1993
Nationality: Indian
Languages known: English, Telugu, Hindi
DECLARATION
I hereby declare that the above mentioned information is correct and I bear the responsibility for the correctness of the above mentioned particulars.
Place : Hyderabad
Date : (MOUNIKA DUBBAKA)