Hardware design engineer, vlsi, embedded
Resume:
K.PRABHU
S/O G.KUMAR,
Pudusampalli, Raman Nagar (po),
Mettur (tk), Salem (dt),
Pin.No:636403.
Email ID: acrzi6@r.postjobfree.com.
Phone No: + 91 – 730-***-****
** - 900-***-****.
PROFESSIONAL SUMMARY
About 2 year am worked as a Technical Analyst in Gem Software Solutions, Chennai.
About 2 year am worked as a design engineer in Arul technologies, Chennai.
Proficiency in ADS Tool, PSPICE, Tanner, Mplab and MATLAB (2009b)
WORK EXPERIENCE
Company
Designation
Duration
GEM SOFTWARE SOLUTIONS
Technical Analyst
September 2011
-
February 2013
ARUL TECHNOLOGY
Design Engineer
May 2013 – TILL DATE
TECHNICAL SKILLS
Skills
Details
Simulation Software
Tanner Tools V15, ADS Tool.
ORCAD- PSPICE, CAPTURE, PCB DESIGN, Mplab, MATLAB
Hardware Implementation
Simulated circuits.
MATLAB simulation interface to real time hardware.
Measurement device handling
Digital storage oscilloscope, Power quality analyzer
Language
C
Packages
MS-office.
EDUCATIONAL QUALIFICATION
Completed Master degree in ARM College of Engineering and technology, Chennai(2013-2015)-7.3 CGPA (M.E-VLSI Design)
Completed Bachelor degree in Anand Institute of Higher Technology, Chennai(2007-2011)-72%(BE-ECE)
Completed Diploma in Thiagarajar Polytechnic college, salem (2005-2008) - 94%
Completed SSLC in government higher secondary school, Mettur (2005)-77%
PROJECTS SUMMARY
Project Details
Topic
Description
DIPLOMA
Automatic railway gate control and signaling unit for unmanned railway.
Automatic railway gate can be control by
sensor. When the train is moving the first sensor
is detect the signal then gate is closed, after level crossing the second sensor is detecting the signal then gate will open. It is used for unmanned railway crossing.
B.E.
Design, simulation
and fabrication of
microwave component
at 2.4GHz for
Wireless application.
The simulation can be used in the ADS Tool.
The antenna, coupler and power divider are designed and fabricated by utilizing the tools.
M.E.
A New Heuristic
Approach to Reduce Static power using
Clustering.
Leakage and Dynamic power both are increasing with every switch to smaller process geometries. However, due to process scaling trends, leakage power has become a major component of the total power consumption in VLSI circuits.This project focus to tackle the leakage problem in CMOS circuits.
A new heuristic approach can reduce leakage current, average power and delay Time in CMOS circuit (16:1 multiplexer) by using clustering algorithm based on power gating method.
ARUL TECH PROJECT WORKING AREAS
Title: Maximum Power point tracking control of DC-DC converter for Resediantial Photo Voltaic system
Description :
Implementaion of maximum power point tracking (MPPT) control in microcontroller for a high step up boost converter for low scaled residential PV systems.The controller extracts maximum available power from panel and adjusts duty cycle of the converter according to changes in irradiations(incident light radiation) automatically. The MPPT converter works according to maximum power transfer theory, in which the panel output impedance should match the load impedance.
Title: Photovoltaic MPPT charge controller
Description:
Design of fast charger system for batteries implemented with MPPT boost converter.
PERSONAL DETAILS:
Date of Birth
13 May, 1990
Gender
Male.
Marital Status
Single.
Mail-id
acrzi6@r.postjobfree.com
Educational qualification
DECE, BE(ECE), M.E VLSI Design
Current location
Chennai.
Preferred location
All over India.
Current CTC
1,44,000 (p.a)
Employment status
Permanent.
Notice period
10 days.
Experience
4 year.
Languages known
English, Tamil
REFERENCES:
1.Mr. C.Ravichandran, Arul Technology, Chennai- 600100, Phone-989-***-****
2.Mr.M. Arulaalan, Assistant Professor (ECE),Anand institute of higher technology,
Chennai-603 103, phone-989-***-****.
DECLARATION:
I hereby declare that the particulars furnished above are true and correct to the best of my knowledge.
K.PRABHU
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