NAME: Varun Singh Chauhan MOBILE: +91-812*******
E-MAIL: acrzea@r.postjobfree.com
CAREER OBJECTIVE
To obtain a position in a industry that gives an opportunity to explore, develop and utilize technical skills involved in various stages of Electronics hardware development life cycle and to gain experience and domain knowledge.
SUMMARY Exceptionally talented Engineer with PG Diploma in VLSI design . Committed to the highest levels of professionalism and excellent interpersonal skills. Demonstrated expertise in Full custom standard cell layout and ASIC verification with industry standard project work. Seeking a challenging role in custom design.
CORE COMPENTENCIES
Programming language :Verilog, System Verilog,C.
Scripting language : Shell,pearl
Tools used :cadence tool suite-NC-Verilog,SIMVISION,Virtuoso,Spectre and Assura, SOC encounter(Floorplan,placement,STA,CTS,Routing),Xilinx
Operating systems :Windows,Linux
PROFESSIONAL AREA OF INTEREST
Physical design,CMOS and Circuit Design, STA,Digital Electronics, Microprocessor and Its Applications and AMBA protocols
ACADEMIC QUALIFICATIONS
Course
Name of school/college
Name of Board/University
Year of passing
Percentage/CGPA
Advanced PG diploma in ASIC Design
Indian institute of VLSI design
Bangalore
Indian institute of VLSI design
2015
85
B.Tech (E&C)
I.E.T Bundelkhand university
Bundelkhand university
2014
62
SSC
Sainik school rewa
C.B.S.E
2009
61
HSC
Sainik school rewa
C.B.S.E
2007
64
PROJECT EXPERIENCE 1)TITLE: LAYOUT DESIGN AND VERIFICATION OF STANDARD CELLS DESCRIPTION: The blocks were combinational and sequential circuits. The modules are verified by checking different parameters such as DRC, ERC extraction, LVS. Entire design is carried out on TSMC submicron 180nm process technologies.
2)TITLE: CUSTOM DIGITAL IMPLEMENTATION OF CRC DESCRIPTION: CRC is an international standard approach to error detection. It protects the data with a checksum. The modules are verified by checking different parameters such as DRC, ERC extraction, LVS. Entire design is carried out on TSMC submicron 180nm process technologies
3)TITLE: RTL coding for AMBA-APB Protocol and verification of the protocol using a layered test bench . DESCRIPTION: AMBA-APB (Advanced Peripheral bus) is an on-chip communication standard used in embedded microcontrollers. The verification is done using a layered testbench. Tool used NC-verilog and waveforms are checked on SIMVISION
4)TITLE: RTL coding for a Synchronous FIFO. DESCRIPTION: Synchronous FIFO is used for buffering the data.Depth of FIFO is expandable
5)TITLE :Synthesis for RAM and ROM Blocks DESCRIPTION: Performed Synthesis For RISC Architecture using low power synthesis techniques.
6) TITLE : Physical Design and verification of DTMF chip. Tool Used :SOC encounter, RTL compiler DESCRIPTION: Floorplanning,power planning,routing,CTS,Design sign off and GDSII of the DTMF chip was done. Technology – TSMC 180 nm, Layers- 6, Macros – 4, Frequency – 125MHz
B.Tech project
1)TITLE: R.F.I.D. BASED SECURITY SYSTEM
DESCRIPTION: Radio-frequency identification (RFID) is a technology that uses communication through the use of radio waves to exchange data between a reader and an electronic tag attached to an object, for the purpose of identification and tracking
Engineering Workshop, July 9 2012 to July 20 2012
(Advanced training institute, Dehradun)
Performed various programs in assembly language.
Engineering Workshop, Feb 13 2012 to Feb. 24 2012
(Advanced training institute, Kanpur)
Used various measuring instruments.
Performed Circuit design
STRENGTH
Good team player and good in inspiring others.
Willing to work and adopt to new opportunities and challenges
HOBBIES & INTEREST
Strumming guitar, Reading novels, Listening to Music.
EXTRA CURRICULAR ACTIVITIES & ACHIEVMENTS
Participated in NATIONAL KARATE CHAMPIONSHIP
BRONZE MEDAL in NATIONAL MUAY THAI CHAMPIONSHIP
Attended the NCC TRAINING CAMP (decade 1) for RDC
NCC ‘A’ CERTIFICATE .
Organize college fest “atharva”
Participated in PowerPoint presentation organize by YOUTHFORNATION
LANGUAGES KNOWN
English,Hindi
PERSONAL INFORMATION
Date of Birth : 10 Sep 1991
Father’s Name : H/CAPTAIN T.P.S CHAUHAN
Address :H.no 724 kairana,dist shamli(U.P)
DECLARATION
I hereby declare that the information furnished above is true to the best of my Knowledge and belief.
PLACE:BANGALORE VARUN SINGH CHAUHAN