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Design Project

Location:
Suri, WB, India
Posted:
October 08, 2015

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Resume:

Curriculum Vitae

PREETI YADAV

**,********,********,****

Kanpur, U.P-208021

Mob# +91-704*******, +91-750*******

Email# acr0cs@r.postjobfree.com

Objective

To seek an opportunity to work in a progressive organization that gives me scope to apply my knowledge and skills in the area of Research & Development with industrial approach. Work Experience

Organization: CSIR-CEERI, Pilani

Designation: Senior Project Fellow

Period: June 2013 to Dec 2013

Job Description:

Responsible for analyzing the Open RISC 1200 architecture and its performance.

Responsible for Implementation of Open RISC processor on FPGA.

Handled the responsibilities of modification of Open RISC 1200 as per specification using VHDL and C.

Involved in various other project related responsibilities. Professional Synopsis

Specialization

Core Skills

Expertise

Technical Skills

Programming Languages

EDA Tools

Platform

VLSI design/Digital Systems

Programming related with application specific digital design using various programming languages.

Implementation of different computer architectures for various microprocessors using C and VHDL, used in developing a Soc.

VHDL, Verilog, C, C++, Microprocessor (8085, 8086) Xilinx ISE, Tanner Tool, Modelsim, Precision Synthesis MicroC, Kiel Microvision

Windows (8/7/XP), Linux

Educational Qualification

M.tech (VLSI System Design) 71% Inderprashtha Engg. College UPTU M.sc (Electronics) 68.3% CSJM Kanpur University

B.sc (Physics, Chemistry, Maths) 51% CSJM Kanpur University 10+2 74% UP Board

10th

2012

2009

2007

2004

2002 66% UP Board

Project Experience

1. Title Technology solutions for Micro Air Vehicle(MAV) development Tool used Xilinx ISE, OR 1K Simulator

Description Design and fabrication of complete system of Unmanned Air Vehicle on a single chip. 2. Title FPGA Based Design and Implementation of a Floating point Arithmetic Unit Tool used Modelsim, Xilinx ISE, OR 1K Simulator

Description Algorithm for the IEEE 754 floating point addition, subtraction, multiplication and division first verified on MATLAB. Then modeling of these arithmetic operations has been implemented by VHDL using single cycle as well as pipeline architecture. The design also implemented and verified on Xilinx Spartan 3 FPGA. 3. Title Smart Traffic Light Controller using 8051 Microcontroller Tool used Kiel Microvision (Embedded C)

Description Smart TLC based on sensors and timers has been implemented using Embedded C. Sensor are used to detect the excess traffic used to trigger the green light. A prototype has been made using Atmel AT89S51 Microcontroller and LEDs. Publications

1. Preeti Yadav, Swina Narula “Design and implementation of pipelined Floating Point Arithmetic Unit using VHDL” in the proceedings of National Conference on Electronics & Communication, Ghaziabad, April 2013.

2. Ankit Shukla, Preeti Yadav “Time Totalizer implementation using interrupts” in the proceedings of National Conference on Electronics & Communication, Ghaziabad, April 2013. Personal Profile

Date of Birth

Sex

Marital Status

Languages Known

Hobbies

Permanent Address

Correspondence Address

14 March1988

Female

Unmarried

English, Hindi

Sketching, Playing Games 31

Naubasta, Hamirpur Road

Kanpur-208021

B-381, 3rd floor, Vaishali

Sec-4 Ghaziabad-201010

Preeti Yadav

Date: 27.07.2015

Place: Gaziabad



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