JINS THOMAS K

Phone: +91-906******* E-mail: acqylp@r.postjobfree.com

Objective

To be part of a VLSI design team which offers highly creative and challenging environment, encouraging new ideas and providing a very good avenue for individual excellence and team effort. Profile

M-Tech – VLSI & Embedded Systems

B-Tech – Electronics & Communication Engineering Synopsis of Experience

2 years of experience in front end RTL design, development and verification for target FPGAs

(Xilinx 7 series & Actel)

Academic Record

Technical Skills

EDA Tools : Xilinx ISE 13.2,Vivado 2014.2, Actel Libero IDE, ModelSim, Matlab/Simulink Languages : VHDL,Verilog

Domain Knowledge: QAM, DUC/DDC, ASIC Design Flow

Interfaces: GPMC, SPI, I2C, UART

Experience

Employer : Mistral Solutions Ltd.

Role : FPGA Design Engineer

Experience : July 2014 to present

Worked in the FPGA Design Team for following requirements under ‘Through Wall Radar’ Project

Design and implementation of Digital Down Converter on Kintex 7 FPGA.

Matlab/Simulink based design and simulation of DDC, BackProjection algorithm

Actel FPGA interfacing with components in RF Tx and Rx Boards and Board bring up tests.

GPMC Multiplexed/ Non Multiplexed interfacing with ARM Processor. Course Year of

Completion

Percentage Institution

M-Tech 2014 88 ER&DCI, CDAC Trivandrum

B-Tech 2009 77 TKM College of Engineering, Kollam

XIIth 2004 91 St.Sebastian’s HSS, Velimanam

Xth 2002 94 St.Sebastian’s HSS, Velimanam

DDR3 interfacing with FPGA and Memory Testing.

NAND Flash interfacing with ARM processor.

SPI, I2C and UART interfacing.

Employer : CDAC

Role : Project Intern

Experience : 1 yr (May 2013 – June 2014)

Work : FPGA implementation of 16QAM Transceiver for Reconfigurable radios. Matlab/Simulink model of the QAM Receiver is designed& simulated first. Later VHDL based design is synthesized and implemented on Artix 7 FPGA.

Employer : Infosys Technologies Ltd.

Role : Software Engineer

Experience : 1.5 yrs (Oct 2009 – May 2011)

Work : Software Development and Support.

B-tech Project

Project Title : Barcode Reader

Work : Designed and developed AT89C51 microcontroller based low cost barcode reader. Certifications & Training

Attended Xilinx Certified Training program on ‘Vivado Design suit Advanced XDC and Static Timing Analysis’ held at December 2014

Achievements

Qualified for UGC NET.

Secured a GATE score of 675 in 2013.

Received Best Performer award in Infosys project team in 2011.

Received Best Mini Project award in TKM College in 2009.

Received Presidential Scout award in 2002.

School Topper in 10th and 12th standards.

Personal Info

Gender : Male

Date of Birth : 19.10.1986

Age : 28

Father's Name : Thomas Mathew

Mother’s Name : Elsamma

Contact Address : BDA Flat #135, Domlur village, Bangalore-560071 Strengths

Willingness to learn new things, Team Player, Adaptable, Optimistic, Hardworking, Punctual. Hobbies &Interests

Playing Table Tennis & Badminton, Listening to Music, Swimming. Declaration

I hereby declare that the above furnished details are true up to my knowledge. Jins Thomas K

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