ITISHREE SAMAL E-Mail:acqu35@r.postjobfree.com

Mob No: +91-889*******

#**, *** ****** **, ************,

Bangalore 560037

CAREER OBJECTIVE:

Seeking a Trainee Engineer position in VLSI design field to expand my knowledge, skills and obtain work experience. I can describe myself as Pro-active and keen to learn & make a positive contribution for the organization.

PROJECTS EXPERIENCE:

Graduation Project Title: Design and Implementation Of 8-bit Vedic Multiplier.

Post graduation Project Title: Design of an efficient Vedic signed multiplier using IEN concept and its integration to a FPGA embedded microcontroller

(Project Details: Optimization of the above signed multiplier is done in terms of power dissipation and delay as compared to conventional ones and it is integrated in to the ALU of FPGA embedded microcontroller to optimize its overall performance.)

Approved for IEEE conference

Duration: 12 Month

TRAINING AND CERTIFICATION :

Cadence VLSI Certification Course at NCE, guided by Prof. Ajit Panda.

SOFTWARE PROFICIENCY:

Languages

: C, C++

Operating Systems

: Linux, Dos, Windows 98/2000/XP/7

ELECTRONICS SKILLS:

Fundamentals of Physics of Semiconductor devices and VLSI design.

Overall concepts on Analog and Digital Circuits theory.

Efficient in VHDL, VERILOG, ASSEMBLY language programming.

Overall idea about tools KEIL, PROTEUS, DSCH, TANNER, PSPICE, XILINX, CADENCE, LabVIEW

PERSONAL SKILLS:

Good problem solving skills

Good memory power

Hardworking and sincere

ACADEMIC QUALIFICATIONS:

Qualification

College/School

Board/

University

Year

Percentage

M.TECH

(VLSI and Signal Processing)

Veer Surendra Sai University Of Technology, Burla

VSSUT

ODISHA

2013-2015

9.3

C.G.P.A

B. TECH

(Electronics and Communication Engineering)

Roland Institute Of Technology,

Berhampur

BPUT,

ODISHA

2008-2012

8.45

C.G.P.A

Intermediate

S.B.R.Govt women’s College, Berhampur

CHSE,

ODISHA

2008

72%

10th Standard

Sri Aurobindo Integral Education Centre

HSC,

ODISHA

2006

85%

ACHIEVEMENTS:

Attended national symposiums on Electro Vista and Utkarsh at RIT.

Successfully organized various technical events (UTKARSH’09) and software freedom day (ELECTROVISTA 2011) at RIT as a member of organizing committee.

Participated in “INFOSYS Spark program ’11”, held at info city, BBSR.

Qualified in GATE-2014

Awarded as the topper of our batch during graduation.

PERSONAL DETAILS:

Father’s Name

:

Tripati Samal

Mother’s Name

:

Mamata Samal

Date of Birth

:

22-10-1990

Sex

:

Female

Religion

:

Hindu

Nationality

:

Indian

Hobbies

:

Reading novels and newspapers, Listening songs

Languages known

:

English, Hindi, and Oriya

Permanent Address

:

At/Po- Nilakantha Nagar 3rd line,

Gosaninuagam, Po- Berhampur,

Dist- Ganjam,

State-Orissa, Pin-760003

DECLARATION:

I hereby declare that the information furnished above is true to the best of my knowledge.

Place: Bangalore

Date: Signature

Contact this candidate