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Nishant Kumar Email : acqj1u@r.postjobfree.com

New Ashok Nagar, New Delhi Contact : +919*********,+919*********/7

Career vision

Passionate to learn new technologies and to excel innovative technology application. Seeking a challenging position which will enable me to continuously learn, create, innovate and simultaneously contribute to the short and long term goals of the organization effectively using technological & managerial skills.

Academic Qualification

12th AISSCE (CBSE Board) with 61%from Saraswati Vidya Mandir, Bettiah, West-Champarn.

10th SSE (BSEB) with 71% from H.S.H. West-Champarn (Bihar).

Professional Qualification

B.Tech (Electronics and Communication) with 71% from Birla Institute of Applied Sciences, Bhimtal (Sister Organization of BIT MESRA, Ranchi).

Technical Skills

Languages :- Verilog,SystemVerilog .

Tools :- ModelSim, Questa, Xilinx.

Methodologies :- VMM, UVM.

Scripting :- PERL.

Editor :- gVim .

Internship:

Infosemi Technologies Pvt Ltd, Noida (June, 2014 – Jan, 2015).

Training under the Kanika Chuadhary (TECH) engineer pertaining to RTL designing and Verification.

Projects Detail

1. AMBA APB Timer (ARM Bus)

I have worked on making AMBA APB interface block that communicate with timer block and AMBA APB bus. In this timer down counter implementing according three mode timer module that have 32 bit address and data registers.

2. FIFO with test bench environment using verilog.

In this project FIFO 32 byte depth memory use for read/write data with 6 flags(almost full/empty,half full/empty,underrun,overrun) is use for synchronization of transmitter and receiver.

3. USB 3.1 VIP.

In this project,I have worked with linked layer which can deal with Power Management,link

Connectivity,packet framing,LTSSM specification,speed management.

4.SPI Master Core

In this projects SPI master Core verification Environment Made by VMM Methodologies in System –Verilog Language.

5. I2C Master Core

I have worked i2c verification environment by simple VMM methodlogy using SYSTEM VERILOG.

In this project I cover Assertion,Constraint Randomization,Coverage.

Area of Interest

AMBA Bus Protocol, IP Level verification, Debugging, USB Protocol(USB 3.1)..

RTL coding, Digital Electronics.

Experience.

6th month experience in ASIC Design and Verification Engineer at Infosemi Technologies Pvt. Ltd.(Noida).

Declaration

I hereby declare that the information given above is correct to best of my knowledge and belief.

Date19 Feb 2015

Place: New-Delhi (NISHANT KUMAR)