FURZANA ABDULRAHIM, PMP

**** ******* **., ******: 248-***-****

Rochester Hills, MI – 48307 Email: acq1ay@r.postjobfree.com

Dynamic leader and problem solver with a track record of proven results

Accomplished Project Management and Hardware Verification professional with over 10 years of experience along with diverse background in both industry and professional services. Highly skilled at engaging and advising executive leadership and delivering effective results in short time frames through challenging situations utilizing expertise in project management, requirement analysis, verification and development. Respected team leader with a focus on offshore team development, reduce costs, improve operations, and enhance the bottom line.

Core Competencies:

Team Development and Leadership

Disaster Recovery

Strategic Planning

Global Delivery Management

Audit and Client Handling

Software Development

Information Security Compliance

Resource Management

Program and Project Management

Hardware Verification

PROFESSIONAL EXPERIENCE

Marketing Associates - Detroit, Michigan 11/2013 to 07/2014

A unique company combining marketing and science to deliver effective and targeted campaigns across a wide array of industries.

Project Manager

Recruited by the CTO to implement Disaster Recovery, Audit, Client Handling and responsibility for project planning, tracking and execution of various programs.

Reviewed and developed Business Interruption Plans and strategies to ensure the appropriate procedures are in place to recover business data/application and minimize recovery risks.

Manage a cross-functional team across the organization and met all critical deliverables with no disruption to client’s ongoing business.

Responsible for ensuring the Business Interruption plan effectively addresses the organization's requirements and within established time frames.

Produced risk assessment and implement audit test plan for assigned audit areas to ensure compliance with company standard practices.

Audit compliance was done in a very short time and during the process corrected many flaws in the system.

Help the company to successfully complete the Ford Audit without any major comments from Ford and helped the company to get more projects from Ford.

Created technical documents for the application handled and identified many bugs in the program.

Identified and help to resolve the issues in programs related to application and data.

Interface with both business and system personnel to ensure effective and timely delivery of project related deliverables.

Defined and directed project goals, objectives, critical success factors, milestones and risks.

Provided overall management, monitoring, and control of Release activities (business, workflow, development, testing).

Coordinate and conduct IT Tour for WIA Youth participants. WIA helps to educate and direct the youths to get job.

IBM - Hardware Verification Experience

One of the fortune 500 company providing Hardware, Software and Professional services with more than 400,000 professionals in over 170 countries

Senior Verification Engineer

1) SUPERCOMPUTING – TORRENT(CTG/IBM, Austin, TX) 04/2008 to 10/2008

Project Description

This chip provides PCI-Express I/O hub functionality through a coherent PowerBus attachment to a set of few Power7 processors. It also provides high bandwidth and low latency clustering capability for creating large scale High Performance Computing (HPC) systems.

Roles & Responsibilities

Wrote test cases to verify the SuperNest Cluster logic in VHDL.

Developed the HDWB setup for regression runs.

Wrote shell scripts to avoid manual work for Torrent SuperNest verification environment.

Successfully running regression in multiple sites to get more regression cycles.

2) HIGH PERFORMANCE COMPUTING (IBM, Poughkeepsie, NY) 06/2005 to 03/2008

Project Description

This Ethernet adapter provides high performance communications for both HPC and traditional IP Applications. This adapter is primarily intended for high volume compute nodes with PCIX/PCI Express support.

Roles & Responsibilities

Developed the verification plan and used NcSim for Simulation.

Designed and coded of 1G and 10G Ethernet models which interact with the logic using Verilog.

Developing the verification environment using DENALI PCI Express Models.

3) STORAGE ADAPTER (IBM, Rochester, MN) 06/2002 to 05/2005

Project Description

This is a single chip SAS and SATA advanced function chip for storage adaptors.

Roles & Responsibilities

Designing and Coding of SAS and SATA models which interacts with the adapter.

Wrote testcases to verify the models and the adapter using VHDL.

Trained new comers for the project & increased their efficiency.

4) I/O BRIDGE (IBM, Rochester, MN) 01/2002 to 05/2002

Project Description

This is a memory controller used in the I/O complex of a server. It moves huge chunks of data between PCI/PCI-X buses and between PCI/PCI-X bus and an Infiniband based systems (device).

Roles & Responsibilities

Designed and Coded Random Command Generator and SDRAM configuration module in C++.

Wrote testcases to verify the models and the bridge using VHDL/C++. Used UniSim for Simulation

5) DIGITAL CORES (IBM, Burlington, VT) 03/2000 to 05/2001

Project Description

The core is PCI (Peripheral Component Interconnect) compatible which can be used with Synchronous and Asynchronous devices

Roles & Responsibilities

Developing VHDL models to generate the bus traffic to test the PCIX core.

Testcase development in VERA HVL to check the basic bus protocol and to cover corner cases that stress the PCIX core. Flexmodels developed by Synopsys.

Development of hands-off regression on the core using scripts written in Perl, Bug logging and verification of fixes

6) SMRITI (IBM, India) 07/1999 to 02/2000

Project Description

SDRAM (Synchronous Dynamic RAM) memory controller which interacts with a PLB (Processor Local Bus) slave. The memory controller is capable of handling page mode and normal mode transfers of data. The refresh mechanism implemented is CAS (Column Address Strobe) before RAS (Row Address Strobe).

Roles & Responsibilities

Designing the SDRAM controller in VHDL.

Synthesizing the module using BooleDozer and HIS fixes. Use MTI for Simulation

EDUCATION AND CERTIFICATION

Bachelor of Engineering, Electronics & Communication Engineering, NIT, India.

Successful completion of Project Management Professional (PMP®) - 2013 .

AWARDS

Most Valuable Employee award from CTG for outstanding work in Torrent verification.

BRAVO award from IBM for outstanding work in Storage Adapter.

WORK STATUS

US - Citizen

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