HITHESH MURTHY

#**** ***** ***, *** 124*-***-*** 9382

Sunnyvale, CA 94086 acpwht@r.postjobfree.com

SUMMARY

Electrical Engineer with Masters and Nine years of professional experience. Areas of expertise

include High speed Board design, development and testing, DFT, DFM, Signal Integrity and FPGA.

TECHNICAL SKILLS

Hardware: 8085, 8051, PIC, MSP430, PLC, HMI, FPGA

Software: Assembly, C, VHDL, Hyperlynx signal integrity, Xilins ISE, Altera Quartus

Design: Matlab, Simulink, OrCad, DxDesigner, Labview, Multisim, Altium, LTspice

Lab Equipment: Oscilloscopes, Function generators, Multimeter, Spectrum analyzer

Operating systems: DOS, Windows, Linux

PROFESSIONAL EXPERIENCE

S3C Inc Jan 2015-Present

Sunnyvale, CA

Product Development Engineer

Design, development and testing of Pressure sensors for Automotive and Industrial applications.

Duties include Board design, MEMS Pressure sensor design, qualification and testing.

Applied Materials Aug 2013 – Jan 2015

Bangalore, India

Electrical Engineer III

Product and subsystem reliability testing including accelerated testing of Electronic modules &

subsystems like IO modules, SBC Power supply, UPS, EtherCAT IO etc

Projects

IO module testing

Tested 3 different EtherCAT based IO modules with various digital and analog outputs. The Digital

output current varied from 50mA to 300mA. The analog IOs are 16 bit precision.

All these modules underwent Thermal cycling, HALT, ESD, Thermal Imaging etc.

Found failure modes before releasing the products to the field.

EtherCAT Module SI Analysis

Signal Integrity Analysis of SPI bus with multiple devices. SPI data had CRC errors when operated

at Full speed. Signal Integrity simulation revealed SPI clock had reflections due to multiple stubs.

Recommended routing clock signal on impedance controlled Layer and using a Fan-out buffer.

UPS HALT test

HALT test of 220VAC 1KW UPS. Designed HALT test fixture and test plan.

HALT test resulted in 2 failures. ESD test resulted in identifying another potential failure.

KVM Test Automation

Designed automated test system to test Keyboard Video Mouse switch. The PS2 signals of

Keyboard and mouse were simulated using a Microprocessor. The input/output of KVM was

probed and displayed on PC using serial port. This eliminated the need for manual testing, which

required long hours of testing and continuous monitoring of keyboard and mouse data.

Low Cost IO module

Functional test, Design and test plan review of Low cost IO module designed by contract

manufacturer.

SiennaECAD Aug 2012 – Aug 2013

Bangalore, India

Project Lead

Responsibilities

• Lead a team of 4 engineers

• Translate marketing/client requirements to Engineering specifications

• Schematic entry, design review, prototyping, Board Layout, board bring up and testing

• Project scheduling, review meetings and milestone meetings

• Co-ordinate with manufacturing, material planning, procurement etc

• Troubleshoot EMC compliance issues

Design and test Point Embedded systems with ARM9 MCU, DDR2 memory, Gigabit Ethernet,

Cellular module, USB, Bluetooth, Zigbee and Zwave for Point of Sale payment gateway

application.

Projects:

SL500

Small form factor board with ARM9, DDR2, NAND Flash and cellular module.

Responsible for entire product development from initial concept to mass production.

SL1000

Advanced version of SL500 with Zigbee module for home/store automation. 8 Layer high density

board.

SL3000

SL3000 is the full-fledged PoS module with redundant cellular module, Zigbee, Zwave and 2GB

DDR2. All designed on an 8 layer board.

General Electric Aug 2010 – Aug 2012

Hyderabad, India

Associate Advanced engineer

• Drill down marketing requirements to System requirements

• Schematic design, prototyping, board layout, board bring up, documentation and testing

• Participate in design reviews and project milestone meetings

Projects:

12/24V Output Module

The module has 32 output channels divided into 4 groups. Each group has Electronic short circuit

protection. Output voltage range is 12-24VDC. A Lattice 256 LUT CPLD is used for backplane to

module serial communication, turn on output channels and LEDs corresponding to each output.

FPGA Verification

Verification of Xilinx 400K gate FPGA on high speed counter board.

Task involves writing test benches to verify FPGA-Microcontroller interface, Serial read/write from

backplane & Microcontroller to FPGA, testing FPGA input-output delay, response time and

different types of counters implemented in the FPGA.

High Speed counter PLC Module

The counter module has both single ended and differential (RS485) inputs with max speed of

1MHz, 5-24V. Inputs were realized using high speed comparators, small footprint dcdc

converters, voltage references etc.

The outputs are designed with electronic short circuit protection feature. Responsibilities include

FPGA verification, board bring up, Analog IO design and HW testing.

Rx3i PLC Backplane

Project involved designing a Compact PCI backplane for connecting modular Programmable

automation controllers. The backplane was designed on 16 layer PCB, with PCI communications

handled by an FPGA. Identified risks early in the design cycle by simulation and analysis. Carried

out Pre-compliance agency testing, thermal, functional testing and verification.

Signal Integrity Analysis

Carried out SI analysis of compact PCI bus and identified risks early in design cycle, reducing risk

and cost. Suggested multiple solutions for signal integrity issues.

Performed SI analysis of DDR2 Memory chips from different vendors to address obsolescence

issue.

University of California, Los Angeles, CA Feb 2008 – Aug 2009

Associate Development Engineer

UCLA, Nov 2008 – Aug 2009

Space Sciences Lab, UC Berkeley Feb 2008-Nov 2008

• Perform system testing, debugging and upgrades.

• Flight software coding for NASA THEMIS Mission.

• Interact with Mission Ops, Scientists and Engineers to determine software changes and

instrument configurations.

• Analyze data from space craft instruments to determine the validity of data and instrument

health.

Projects:

Actel FPGA Verification

• Wrote test benches to verify VHDL code written for Actel FPGA

USB HID Interface using FPGA

• USB HID interface and enumeration using Spartan 3 FPGA and MAX3420 USB interface IC.

The FPGA communicates with the Max3420 using SPI interface. Entire enumeration and

data transfer is done in FPGA.

Improving the Solid state telescope Operation

• Implemented an IIR filter to improve the SSTs and avoid the sun pulse from closing the

SSTs.

Flight Software Upgrade

• Upgraded flight software from Version 4 to 5

Magnetometer Noise diagnosis

• Resolved the spin period dependent noise on the fluxgate magnetometer data.

• Performed extensive tests on the Flatsat and used FFT, wavelet analysis to determine the

cause of the noise.

• Eliminated most of the noise by changing the spin period of the space craft.

Data Compression error

• Detected and identified the cause for on board data compression error occurring only at

the perigee of the orbit.

CHEMOIL CORP, Long Beach, CA Nov 2007 - Jan 2008

Instrumentation Engineer

• Implemented PLC/HMI control.

• Programmed electronic valves, flow meters, temperature and pressure sensors.

NON LINEAR ION DYNAMICS May 2005 – Oct 2007

Panorama City, CA Oct 2006-Oct 2007

Assistant Development Engineer

• Procuring parts, Circuit design, PCB Layout, PLC implementation and high power

transmitter mod.

Projects:

Programmable Logic Control for Klystron Microwave tube

The Klystron tube is used as a Microwave source to separate Isotopes using the Plasma

separation process. The Project involved designing a PLC based control system for a high power,

high frequency (10KW, 10/18GHz) klystron Microwave tube. The PLC reads the temperature,

flow, and other critical parameters through interface circuits. It controls the High voltage supply

to the tube. The Klystron is completely protected against over current, over voltage and

temperature. A touch screen HMI is used to operate the system and monitor all the parameters.

Temperature and Flow sensor Instrumentation

This Low noise circuit amplifies the signal input from multiple temperature sensors and

converts the flow meter output to frequency. The Frequency is directly proportional to the flow

rate in GPM. A differential amplifier input stage for the flow meter eliminates all the 60Hz noise

and any other common mode noise.

Klystron Interlock Circuit

The interlock circuit measures the Klystron beam current, body current, high voltage and

other critical parameters. When any of the parameter exceeds the limit, the circuit triggers an

Ignitron in microseconds, which shorts out the High voltage input and protects the tube from

damage.

Modification of High Power transmitters for pulsed operation

Project involved modifying a 100KW CW transmitter to a 300KW pulsed transmitter. The

high voltage power supply had to be modified due to increase in the output power. A 3-phase SCR

power controller is used for soft start. All the parameters are monitored and controlled by a

PLC/HMI interface.

Current limit control for Plasma Chamber

A simple opamp based circuit senses over current and under current limits and keeps it

within usable range. The current is controlled by driving a motor which is connected to the power

supply potentiometer.

HIPAS Observatory, Fairbanks, AK May 2005 – Oct 2006

• Analog and RF control circuit design, maintained and troubleshot electronics to control and

monitor high power transmitters and assisted scientists with their research.

Projects:

8-Channel Digital attenuator with a step resolution of 0.01dB

Digitally controlled attenuator with a step resolution of 0.01dB for attenuating a 2.85MHz

analog signal. A step resolution is 0.01db is required since the signal is amplified by ~60db.

RF transmitter Current measurement

The Circuit was designed for a noisy environment with high power RF transmitters. The

output voltage is converted to light and transmitted through a fiber optic cable to avoid EM and

RF interference. Used an Instrumentation amp for high Common mode rejection.

Digital Meters with Fiber Optic input-output

The digital Meters take a fiber optic input, convert it to voltage and display the digital value on

a LED display.

Droop less Peak Detector using Digital Pot

This Peak detector makes use of a comparator with TTL output and a Digital potentiometer

to acquire the peak of the signal. It is able to detect pulses as narrow as 40ns with amplitude up

to 10Vp-p.

Digitally Controllable Phase Shifter

Designed using an all-pass filter and a digital pot, Phase can be varied from 0 to -180 by a

digital pot with Up/Down control.

ACADEMIC PROJECT EXPERIENCE

Disk Drive Controller Design

• Designed a Hard disk drive controller in Matlab for the given specs and transfer function of

a 60GB, 7500rpm disk.

Embedded Robotic Communication

• Designed and implemented an inter-robot communication system for robo-cup football on

two Compaq Pocket PCs mounted on mobile robots.

• Used Bluetooth module in the pocket pc to build a Master-Slave communication system,

where the team leader can control all the other robots.

Pocket PC IR Remote

• Identified the frequency that is transmitted by a remote control unit and transmitting a

similar pulse using the infrared port on the pocket PC. The program can be modified to

learn a new remote, which might transmit a different frequency and pulse timing.

Robot Pose estimation by matching 2D laser scans

• Estimated the Robot Pose using 2D laser range scans from the robot.

Autonomous Robotic Vehicle using PIC 16F877 Microcontroller

• Conceived and built an indigenous version of NASA’s Mars Path finder Robot.

Microprocessor/Microcontroller experience:

• Designed and built a soft drink vending machine using 8085 Microprocessor.

• Designed and built microcontroller (PIC16F84) based Infrared motion sensor.

• Designed and built an ultrasonic intruder alarm using PIC16F84 Microcontroller.

EDUCATION

Masters in Electrical Engineering, 2005

University of Southern California, Los Angeles, CA

Bachelors in Instrumentation & Electronics, 2001

Bangalore University, India

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