UDIT ARORA Contact No: +919*********

Email id: acphd2@r.postjobfree.com

Permanent address: B-66, second floor, Ganesh Nagar

Tilak Nagar, New Delhi- 110018.

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Date of Birth: 25 October, 1991

Languages: English, Hindi, Punjabi

OBJECTIVE

To pursue a challenging career in a leading and progressive organization offering opportunities where my skills can be put in

for the accomplishment of a project. Prepare myself to obtain workplace experience which will help me to achieve my

overall goal of becoming a business leader with a strong technical backgro und.

WORK EXPERIENCE/SUMMER INTERNSHIP

ERICSSON

NETWORK th

GLOBAL INDIA 07 July,2014 till present

ENGINEER

SEVICES

Project Presently working as Switch Network Planning Engineer with Ericsson Global India Pvt Ltd for the SPRINT

Description project.

Working experience in Core CDMA Planning and Migrations from CDMA to 4G.

1.

Assign physical and logical platform assignments like Voice, EVDO, and Inter -MSC Trunk.

2.

Design, Analyse, Plan and modify network components supporting customer communication

3.

implementation activities.

Develop various routing scenarios and implementation schedules.

4.

Manage and assign physical and logical platform assignments for new/existing circuit layout

5.

Learning from records to support capacity augments.

project Maintaining Daily Network KPI's like T1 Augment, Maintaining Database Integrity, EVDO Augment,

6.

NVDisconnect.

Provide technical support for new technology, optimization efforts, special events, disaster

7.

recovery and special projects.

Work directly with local Field Operations and Project Management teams to support rehomes,

8.

network grooming and optimization plans.

Provide technical and analytical support for existing and new technology.

9.

MTNL TRAINEE 24th June 2013 – 2nd August 2013

1. Training was based on GSM (Global System for Mobile Communication) and its architecture.

Project

2. Visited various subunits of MTNL and observed the live working of various components of GSM

Description

(Global System for Mobile).

1. Studied History and advance level of telecom industry.

Learning from

2. Observed and studied a Variety of equipment’s/rooms like switch rooms, optical cable room,

project

BTS (Base transceiver station), BSC (Base transceiver station), MDF and Power supply room.

3. Also studied Optical cable splicing.

Learning from

project 4. Learnt about the basic architecture of GSM (Global System for Mobile).

DKOP LABS PVT. th th

TRAINEE 15 June 2012 – 24 July 2012

LTD.

1. Design of Traffic Light Controller using Verilog coding and implementing on FPGA (Field -

Project

programmable gate array) tool kit.

Description

2. Training based on VERILOG language.

1. Project was related to Verilog coding implemented on FPGA (Field-programmable gate array) kit.

2. I made various design of logic gates, Mux (Multiplexer), Demux (Demultiplexer), State Machine

(Moore and Mealy state machine), Counter, Flip -Flop (D and T flip-flop), Adder, Subtractor, Encoder,

Learning from

decoder using various style of modelling such as gate-level, behavioural, switch modelling and

project

implemented these by using various software’s and tool kit.

3. Worked on the concept of Verilog language using software’s including as ModelSim, Xilinx,

Digilent and FPGA (Field-programmable gate array).

ACADEMIC BACKGROUND

Year Qualification Institution/School Subjects Percentage

Secured

Maharaja Surajmal Institute of Mobile Communication, Computer

Networks, VLSI, C/C++, DBMS,

technology.

B.Tech in Electronics

Operating system, Software

and Communication (Guru Gobind Singh Indraprastha

2010-14 71%

Engineering, Digital circuit and system,

Engineering University, New Delhi)

Microprocessor system.

Maharaja Aggarsain Adarsh Public English, Mathematics, Physics,

School Chemistry, Computer Science

2009 XII (CBSE Board) 65%

Maharaja Aggarsain Adarsh Public English, Hindi, Maths, Science, Social

School science

2007 X (CBSE BOARD) 75%

KEY ACADEMIC PROJECTS

Major project based on OFDM TRANSMITTER using LABVIEW.

Minor project on BPSK modulation using DAC (Digital to Analog Converter) converter on FPGA (Field-Programmable

Gated Array) kit.

Prepared Seminar report on modern Integrated circuit masking called Electron Beam Lithography.

Visited Telecom Industry subunits of MTNL.

Design of Traffic Light Controller using Verilog coding and implementing on FPGA (Field-programmable Gated Array)

Tool kit.

EXTRA-CURRICULAR ACTIVITIES/ACHIEVEMENTS

Design a MACRO using VBA and MySQL for onshore team and for the SNP team for database update .

Awarded as an EMPLOYEE OF THE MONTH (OCTOBER, 2014) in ERICSSON GLOBAL INDIA SERVICES.

Won first prize in GO OPEN QUIZ (based on LINUX) in ERICSSON GLOBAL INDIA SERVICES.

Attended seminar on Entrepreneurship Awareness Drive 2013 at conference hall, North campus, University of Delhi.

Attended workshop on Cyber Security 2013 held at conference hall, North campus, University of Delhi.

nd

Secured 2 position in Inter House Cricket Tournament (2007-2008).

st

Secured 1 position in Inter House Cricket Tournament (2006-2007).

st

Secured 1 position in Zonal Tournament of Cricket (2005 -2006).

ADDITIONAL INFORMATION

Strengths: Excellent presentation skills, Disciplined, Dedicated, Hardworking, Quick-learner and

Punctual, Possess leadership qualities, Acquire excellent knowledge of analytical,

numerical and computer skills.

Computer Languages/skills: C++, C, MySQL, EXCEL VBA (Visual Basic for Applications), VERILOG, VHDL, MATLAB,

EMBEDDED SYSTEM (PROGRAMMABLE IC’s 8085, 8086, 8051), MS-WORD, MS-EXCEL.

Networking: Basic knowledge of IMS (IP Multimedia Subsystem) principle and associated NODES,

Principles of 2G, 2.5G, and 3G Cellular Telecommunication (GSM),Knowledge of BSS,

NSS, OSS Operation, Knowledge of Call set up and Call processing scenarios, Knowledge

Of SS7 architecture and protocols ISO-OSI MODEL, TCP/IP MODEL, GSM and its

Architecture, IEEE STANDARDS & LAN/MAN/WAN/PAN.

Operating Software: NI LabVIEW 2013, ModelSim PE Student Edition 10.1b, Xilinx ISE Design Suite

12.1, Digilent Adept System v_2.8.1, EDA (Electronic design automation) tanner tools

(L-edit, T-edit, S-edit, and W-edit) and MATLAB.

Operating System: LINUX Shell Scripting (Ubuntu), WINDOWS XP/7.

Hobbies: Playing cricket, Driving car, Gaining knowledge on future technologies on internet,

and Listening music.

Contact this candidate