JAN VINCENT CARREON FRANCISCO

#**** ******** **., ******** ****, Bayanan, Muntinlupa City, Metro Manila, Philippines, 1772

Phone: +63-917-***-****

Email: acpa7n@r.postjobfree.com

Registered Electronics Engineer #43725

An Electronics Engineer with more than two (2) years of experience as a Field Reliability/Product Analysis Engineer

in a Research and Development Site of a multinational company based in Manila; and with more than three (3)

years of experience in a clean and high volume manufacturing environment as a Test Manufacturing/Product

Engineer in Multinational Semiconductor company based in Cavite. And as a Communications Engineer, with

experiences which includes broadcasting television program for channels in Local and International Cable

Companies. Through these, I have established consistency, dependability, and can perform with minimal

supervisory and managerial follow-ups towards a given task.

Professional Experiences:

LATTICE SEMICONDUCTOR (PH) CORP. October-2012 to Present

Reliability Engineer

I worked as a Field Reliability/Product Analysis Engineer to analyse and address customer returns. Product families

include SPLD, CPLD, FPGA, and Mixed-signal products in a variety of package types.

Activities include analysis of customer returns analysis, report writing and customer interfacing.

Perform electrical (EFA) and physical failure analysis (PFA) including DC bench testing, ATE testing, XRAY,

SAT, de-processing, Programmer Analysis, Liquid Crystal Analysis and other necessary techniques either

in-house or outsourced as necessary.

Make recommendations for continuous improvements to Design and Manufacturing Engineering on the

design, materials and processes used to assemble and test our products.

PROJECTS INVOLVED:

Reliability Monitoring Program. Performs environmental stress testing leading for product qualification or

monitoring. Lattice maintains a comprehensive reliability qualification program to assure that each

product achieves its reliability goals. After initial qualification, the continued high reliability of Lattice

products is assured through on-going monitor programs. All product qualification plans are generated in

conformance with the company’s Qualification Policy with failure analysis performed in conformance with

the company’s Failure Analysis Procedure.

Document Specifications for Manual ATE testing for LT, Q2 and Nextest Flatforms . Write up some

procedure and guidelines and document to the company vault for standardization of the steps to follow

during ATE testing for failure analysis.

Root Cause analysis on Assembly Related failure i.e. Wirebond issue due to Chlorine Contamination .

Drives identification of the root cause of a Customer return which is failing with a part application for

consumer mobile.

ANALOG DEVICES INC., PHILIPPINES May-2009 to September-2012

Test Manufacturing/Product Engineer

I have worked as a Test and Product Support Engineer for devices used in AUTOMOTIVE applications. The types of

devices include Op-amps, In-amps, Microcontroller, and Voltage reference devices.

Debug, Modify and Revise Test programs in ATE as necessary fix to product Issues, customer returns and

customer requirements.

Monitors and takes care of Product Yield. Prevents and solves Low yield issues and QC failures .

Published OPLs (One-Point- Lessons) to help out manufacturing understand the new procedures.

Manufacturing/Line Support to Production and gives disposition/release engineering hold lots .

Implement statistical Process Controls to prevent customer returns and quality issues .

Investigates and Resolve Customer Return Issues.

PROJECTS INVOLVED:

The “iPAT” (In-line PAT). This is a Dynamic PAT (Part Average Testing) implementation which enables the

test program to automatically generate Statistical Limits to enhance the PD limits . This was proven to

effectively screen-out units with potential reliability problems.

Root fixes on QC failures. QC Failure fixes done on the test program for OP291 Aisin has proven effective,

this resulted to the good performance of the OP291 ILS PPM and its improving customer return trend;

adding the fact that the same good observation was noted by Aisin during customer audit .

FPA (First Pass Analysis). A statistical control placed at the 1 class test that enables the system to capture

st

potential assembly, FAB and reliability issues. And SBL (Statistical Bin Limit). A proven statistical control

tool that alerts the engineers for abnormalities and miss- processes on the lot.

Overall Yield Monitoring. Keeps the Test Engineering Team updated on Product Yiel d Issues through

Statistical Yield Limits calculations.

APOLLO GLOBAL CORPORATION April-2009 to May-2009

Network Operations/Broadcast Engineer

As a Network and Broadcast Engineer, my functions include Switching, Video Graphics Enhancement, AV

Conversion/Digitization, Coverage, and Satellite Communications.

Channel Programs Grid Monitoring. Review grid for gaps and clean overall Play out as Part of Quality

Control Inspection.

Synchronize play out based on switchover times as per program line up every channe l.

Check project settings such as equalizers and filters for final Aural and Visual Broadcast Characteristics.

Provide live broadcast feed for Off Track Race betting.

Skills and Tools:

Languages Unix, JAVA, MATLAB, Basic VHDL

Statistical Tools Statistical Process Control (SPC), Part Average Testing (PAT) and In-Line Part

Average Testing (iPAT), Statistical Yield Limit (SYL) and Bin Limit (SBL)

Work Tools OCAP (Out-of-Control Action Plan), 8D Tools Training, 5S Principle, Process

Creation Methodology (PCM), Performance Management System (PMS),

Performance Management Methodology (PMM) and Problem Solving

Methodology (PSM), Corrective Action Request (CAR) and Material Review

Board (MRB) Process.

Office Tools Microsoft and Open Office: Word/Excel/PowerPoint/Outlook

Platforms Windows, Linux, Solaris, Vxworks, PROMIS

Laboratory Tools Diamond, BP Programmer, Model 300 Programmer, Sonoscan D9500 (SAT),

Nordson (X-ray) Dage, Curve trace tool using SMT Max Procedure

Testers Used ATE CTS Tester Instrumentation, Teradyne FLEX Testers and A565, LTX, KTS

Linear Technology (LT1101) Tester and Quest Consulting (Q2/62) Test System

Handler Used MT9918, MT9308, SEIKO-EPSON, DELTA CASTLE/EDGE/DESIGN, MT Tapestry

Broadcast Mediums Players: DVD/Betacam Tape/Mini DV, Canopus, Digital AV Mixer, Component

TBC (Time Base Controller), Wave form Monitor, Satellite Receiver

Graphic Enhancements Corel Draw/Paint, Adobe Photoshop, Paint, ACD See

Video Editing Tools Movie Maker, Pinnacle, Ulead VideoStudio, Edius, Adobe Premier.

Creative Talent like Drawing, Lay-Outing, Photo and Video Enhancing.

Knowledge in power supplies, meters, oscilloscope and electrical soldering skills.

A self-starter and a team player with excellent planning and project management.

Average communication and presentation skills with 2 dialects of the Filipino and fluency English tongue.

Educational Background:

College Level (June 2003 – April 2008)

Course: Bachelor of Science Major in Electronics Engineering

School: Mindanao State University – Iligan Institute of Technology

Location: Aguinaldo Ave., Tibanga, Iligan City

Awards: Graduated CUM LAUDE with an overall GPA of 1.505, Finalist of 2nd FPGA Design Competition

for the Project “Voice Operated Calculator using FPGA” at U.P. Diliman, Consistent Dean’s Lister from

all year level.

Accomplishments:

Special Project (March 2008)

Title: “Voice Operated Calculator using FPGA”

Description: A digit either from 0 – 9 or an operation is uttered in a computer microphone as input for

the speech recognition in MATLAB. Bits of data are, then, send to the FPGA for calculation with the use

of VHDL. This calculator performs basic operations.

Task: Digital Signal Processing and Neural Networks with MATLAB

Design Project (March 2007)

Title: “Microwave Communication System Design”

Description: This project is a systematic plan or proposal of a microwave radio communication link

between two municipalities of Lanao del Norte.

Task: Microwave Path Data Calculation

Affiliations, Trainings and Seminars:

Licence: Electronic Engineer #43725 (December 2008)

Registered Electronic Engineer by the Professional Regulation Commission of the Philippines

Member; Institute of Electronics Engineers of the Philippines, (IECEP) Inc., North Mindanao Chapter at

Cagayan de Oro City and National Chapter at Manila; (January 2008 – present)

On the Job Training (April – May 2007: 320 hours)

Company: MAXIM Philippines Operating Corporation

Location: Gateway Business Park, Javalera, Gen. Trias, Cavite

Position: Test Engineer (OJT) – Final Test KTS/LTX/AOT

Task: Correlation of Hardware for Production Release w/ LTX & KTS, Debugging Down Tester; and Setup

for Production

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