Xiaodong Hu **** South King Dr, Apt. ***, Chicago, IL 60616
312-***-**** aco0nc@r.postjobfree.com
SUMMARY OF QUALIFICATION
? Skilled in Verilog, VHDL, C/C++, MATLAB
? Experienced in software such as Cadence, Modelsim, Spicevision, Quartus II, ISE, and C++
? Knowledge of VLSI, RF microelectronics, Digital communication and Computer organization
? Skill in teamwork
EDUCATION
? Illinois Institute of Technology, Chicago, IL, US 08/2013-05/2015 (Expected graduation)
Master of Science in Electrical Engineering
? Hunan Institute of Science and Technology, Hunan, China 09/2009-06/2013
Bachelor of Electronics and Science Technology
PROJECTS
? Different full-adders and multiplier design by using Verilog based on Cadence and Synopsys, UNIX operation system. Including Schematic and layout design, RTL simulation, logic synthesis, equivalence checking and optimization.
? Fast Discrete-Cosine-Transform implementation by using Verilog based on Xilinx ISE. Including logic synthesis and test simulation.
? Register Transfer Level (RTL) power reduction for one Mobile Multimedia Processor by implementing Enhanced Clock Gating technique based on Synopsys Design compiler.
? Analog signal amplitude and frequency modulation based on MATLAB.
EXPERIENCE
Intern, Hunan Advancedchip Electronics Ltd Changsha, China, 07/2014-08/2014
? Analyzed an integrated circuit by using Spicevision software
? Gained Familiarity with circuit module partition
? Experienced working in a team (3 or 4 members)
Research, Innovation Research and Training Program of Hunan University Changsha, China, 05/2011-08/2011
? Researched Multi-Object Orientation System based on Delphi
? Developed Delphi interface
? Debugged and analyzed the error of circuit
RELEVANT COURSES (GPA:3.50)
Digital Signal Processing, Communication Engineering Fundamental, RF Integrate Circuit, Introduction to VLSI, Advanced VLSI Design, Computer Organization and Design, High Performance VLSI IC systems, Fault Detection on Digital System, VLSI Architectures for Signal Processing and Communication Systems, CAD tools for VLSI design