TEJAS S. SHETTY

*** * ****** **, *** *** • Arlington, TX 76013 • 817-***-**** • acn3ll@r.postjobfree.com

LinkedIn Profile page: www.linkedin.com/in/shettytejas/

SUMMARY

Graduate Research Assistant with research focus in packaging, Design for Reliability (DfR), Failure Modes and Effect

Analysis (FMEA) and material characterization

Experience with multi-level interconnect reliability analysis and board characterization

Experimental capability on Instron Microtester, Digital Image Correlation, Section/Cutting Machine

EDUCATION

The University of Texas at Arlington, TX GPA: 3.6/4.0

Masters of Science in Mechanical Engineering (Dec 2014)

Thesis: Board Level Reliability Assessment of Thick FR-4 QFN Assemblies under Thermal Cycling

University of Mumbai, India

Bachelors of Engineering in Mechanical Engineering (June 2010)

RESEARCH/ WORK EXPERIENCE

Birth-to-death (from Die Metal/Passivation Processing to Board Assembly) Modeling Methodology for the

(Feb 2014 – Present)

Optimization of Custom Board-Level Reliability - SRC TASK 2512.001

Research Team – Student

Failure analysis of QFN packages using FEA simulations and experimental analysis

Board characterization and validation for layered and lumped model

(Aug 2013 – Present)

Electronics MEMS and Nano-Electronics System Packaging Center (EMNSPC), UT Arlington

Graduate Research Assistant

Fracture and crack growth analysis on a flip chip package using FEA and Molecular Dynamic (MD) simulation

Thermal management of 3D packages with Through Silicon Vias (TSV)

Benchmarked the modeling methodology in ANSYS workbench for QFN package with existing literature

FLSmidth Pfister India Ltd – Mumbai, India (Aug 2010 – May 2012)

(Formerly known as Transweigh India Ltd)

Engineer (Design - Mechanical)

Selected Direct Bought-out Items (DBO) by performing load and power calculations and ascertaining they are within

cost parameters

Generated Layouts (GAD) of systems and designed assembly and detailed drawings of individual equipment’s

Analyzed existing products / systems and re -designed the same for enhancing operational efficacy with the focus on

reducing wastages & achieving maximum cost savings

PUBLICATIONS

Shetty, T., Deshpande, A., Lohia, A., Mirza, F., Agonafer, D., “Design Analysis Of Thick FR-4 QFN Assemblies For

Enhanced Board Level Reliability” InterPACK, San Francisco, USA, July 2015 (Abstract accepted)

Baig, Z., Shetty, T., Mirza, F., Sakib, A R, Nazmus., Agonafer, D., “Impact of Replacing Sn-Ag Bumps with Cu Pillars

on the BEoL Cu/low-k Fracture Under Reflow – A Computational Study” ITherm, Orlando, USA, May 2014

Mirza, F., Shetty, T., Agonafer, D., Akhter, R., Hossain, M., “Improved Thermal Path in 3D Packages using Higher

Conductivity Molding Compounds” ESTC, Raleigh, USA, October 2014 (Accepted)

Mirza, F., Parekh, H., Shetty, T., Agonafer, D., “Multi-Variable Multi-Objective Design Optimization of BEoL/ fBEoL

Structure in a Flip Chip Package during Chip Attachment to Substrate” Journal of SMT, Dec 2014 Volume 27, Issue 4

TECHINCAL SKILLS

CAD/Design Tools: ANSYS Workbench, ANSYS APDL, Icepak, PRO/E, SOLIDWORKS, AutoCAD, Allegro PCB

Designer, ViewMate, LabVIEW, MATLAB. MS Office tools

PROFESSIONAL AFFILIATIONS

Treasurer, Surface Mount Technology Association (SMTA) UT Arlington Student Chapter

REFERENCES

Dereje Agonafer, PhD Alok Lohia (SRC Liaison)

Professor, The University Of Texas at Arlington Packaging Engineer, Texas Instruments

817-***-**** 512-***-****

acn3ll@r.postjobfree.com acn3ll@r.postjobfree.com

Contact this candidate