VISHNUTEJA PONUGUMATI

Mobile: 897*******,

Email: acn3dh@r.postjobfree.com.

Professional Objective:

My objective is to work in a challenging environment which will bring the professional best out of

me as well as contribute value to the organization.

Educational qualifications:

S.NO COURSE SCHOOL/COLLEGE/UNIVERSITY YEAR OF PASSING PERCENTILE

1. B-Tech 2014 63.5%

QIS Institute of Technology

(E.C.E) (JNTU Kakinada)

2. Intermediate UMR Junior College 2010 75.3%

(M.P.C)

3. S.S.C Nirmal Vidhya Nikethan 2008 78%

Professional Qualification:

Maven Silicon Certified Advanced VLSI Design and Verification course:

From Maven Silicon VLSI Design and Training Center, Bangalore.

Year: July 2014.

Projects:

1. Title: Detection and Avoiding Accidence on Highways using GPS and GSM.

Team size :4

Contribution : Analyzing the operations of sensors.

Tools : KEIL uvision software.

Description: this project is about advanced technologies in cars for making it more intelligent

and interactive for avoiding accidents on roads using GPS and GSM technologies.

2. Title: Router 1x3 – RTL design and Verification

Team size :2

HDL : Verilog

HVL : SystemVerilog

EDA Tools : Questa -- Verification Platform and ISE

Description: The router accepts data packets on a single 8-bit port called data and routes the

packets to one of the three output channels, channel0, channel1 and channel2.

Skills:

Summary of Qualifications

1) Experience in writing RTL models in Verilog HDL and Test benches in SystemVerilog.

2) Basic knowledge on UVM.

3) Good understanding of the ASIC and FPGA design flow.

4) Good knowledge in verification methodologies.

5) Experience in using industry standard EDA tools for the front-end design and verification.

VLSI Domain Skills

HDL : Verilog

HVL : SystemVerilog

EDA Tool : Questasim and ISE

Verification Methodologies : Coverage Driven Verification

TB Methodology : UVM

Domain : ASIC/FPGA front-end Design and Verification

Knowledge : RTL Coding, FSM based design, Simulation,

Code Coverage, Functional Coverage, Synthesis.

IT skills

1) C-Language

2) Basics of java

Achievements:

1) Presented power point presentation about SMART ANTENNA in PACE College of

Engineering and Technology.

2) Presented power point presentation about PILL CAMERA held at E.V.M College of

Engineering and Technology.

3) Successfully organize technical festivals in the campus of QIS Institute of Technology.

4) Organize Blood donation camps held in QIS Institute of Technology.

Personal profile:

Father’s name : P.Srinivasarao

Date of birth : 16-01-1993

Present address : #15,mayuri PG,arekere gate signal,bannerghatta road,Bangalore-56.

Permanent address : 6-37,konijedu,tanguturu(M),prakasam(D),Andhra Pradesh, PIN-523272.

Religion : Hindu.

Nationality : Indian.

Declaration:

I hereby declare that the above furnished details are true to the best of my knowledge.

( P.VISHNUTEJA)

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