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Design Engineer Project

Location:
India
Posted:
February 01, 2015

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Resume:

CURRICULUM VITAE

G.OMKARESWARI

MIG I -***,

APHB COLONY,

ADONI,

KURNOOL(DT), A.P

Cell.No:739-***-****

PIN – 518302

E-mail: acn39z@r.postjobfree.com

OBJECTIVE:

Being a final year post graduation student in the VLSI stream, I am seeking

for the position of a Design Engineer that requires applying my analytical skills in the

field of VLSI.

EDUCATIONAL PROFILE

Board / Year of

Aggregate

Course Institution

University Completion Sri Venkateswara college JNT University,

M.TECH of engineering and Anantapur. 2013 77.79

(VLSI Design) technology, chittoor.

St Johns college of JNT University, 2009 62.7

B.TECH

engineering and Anantapur

(ECE)

technology,

yerrakota,yemmiganur.

Board of Intermediate

Satya sai jr college, Education 2005 84.2

Intermediate

Anantapur.

Board of

C.Mallikarjuna vidyalaya, Secondary 2003 63.7

SSC

Adoni. Education.

ACADEMIC PROJECT

Project name: Designing of 128-bit low power area efficient carry select adder.

Software Requirements: ModelSim-Altera 6.3, Xilinx ISE 9.2i.

Description:

Carry select adder is one of the fastest adder to perform arithmetic operations. From the structure

of CSLA there is scope for reducing the area and delay. Based on the modification of 16,32,64

and 128-bit carry select adder (CSLA) has been developed and compared with the regular CSLA

architecture. The proposed design has reduced the more delay and area compared to regular carry

select adder.

TECHNICAL SKILLS:

Language known :Verilog, VHDL, C.

Tools :ModelSim-Altera 6.3, Xilinx ISE 9.2i.

ACHIEVEMENTS AND ACTIVITIES

Participated in vlsi and embedded system workshop for two days.

PERSONAL PROFILE:

Date of Birth : 05-08-1988

Father’s name : D.NAGASESHU

Marial status : Unmarried

Sex : Female

Nationality : Indian

Languages Known : English and Telugu, Kannada

DECLARATION:

I here by declare that the information furnished above is true to the best of my knowledge.

(G.OMKARESWARI)



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