SHALINI JAGTIANI

M. Tech Microelectronics & VLSI, IIT-ROORKEE

Phone: +91-992*******

Email: acgc6f@r.postjobfree.com

AREA OF INTEREST

Analog & Digital design/ Verification/Validation /Device Modeling

EDUCATIONAL QUALIFICATION

M. Tech (2012-2014) in Microelectronics and VLSI with 8.9 C.G.P.A(second rank) from IIT Roorkee

Qualified GATE in Electronics & Communication with 98.8 percentile in the year 2012.

B.Tech. in Electronics & Communication with 73% aggregate from Anand Engineering College, Agra in 2008

Passed Intermediate from Queen Victoria Girls Inter College, Agra- affiliated to U.P Board with 65.8% in 2003

Passed High School from Queen Victoria Girls Inter College, Agra- affiliated to U.P Board with 62.3% in 2001

PROJECT DETAILS

M. Tech –Dissertation at IIT Roorkee [2013-2014]

Title: Reset Current and Reset Time Scaling in an Alternative Phase Change Memory (PCM) Device

Efficient 3D Thermal simulator has been designed through extensive physics based models using finite difference

methods which have linear run time, and less memory requirement for Phase Change Memor y (PCM) device simulations.

This transient simulator provides fast and accurate prediction of RESET current, RESET time and non -uniform

temperature distribution profiles during SET and RESET operations of PCM cell. Furthermore, RESET current and

RESET time minimization strategies have been explained in a novel alternative Phase Change Memory (PCM) Device.

Through extensive modeling of PCM it has been found that, proposed PCM structure not only reduces RESET current but

also minimizes RESET time, thereby solving part of significant design challenges for PCM cell.

Advisor: Dr. Arnab Datta, IIT-Roorkee, India

M. Tech – Minor project at IIT Roorkee

Title: C Language Implementation of Various Algorithms to Solve Special Cases of Linear Transient

Analysis

I worked on a minor course project, in which various algorithms for solution of linear circuit equations were implemented

in C language. Gauss Elimination and LU factorization were used in sensitivity and linear transient analysis.

B. Tech – Course project at Anand Engineering College, Agra [2007 – 2008]

Title: Automatic room light controller design

An automatic room light controller System was designed using 89c51Microcontroller and infra red sensors. When anyone

crosses the infra red beam then circuit provides a sharp pulse and circuit recognize the pulse for counting and Lights will

be automatically turned on.

SKILLS & COURSES

Computer Languages: C, Verilog

Software Tools: Sentaurus-Sdevice, Inspect, Techplot, and related Synopsys EDA tools, Tanner EDA tools, COMSOL

Multi-physics, MATLAB.

Major Courses Taken at IIT Roorkee:

Digital VLSI circuit design

MOS device and physics

Analog VLSI circuit design

Semiconductor materials and devices

VLSI Technology

EXPERIENCE

IIT Roorkee – Post-Graduate Student [2012 – 2014]

Through the present research work at IIT Roorkee on PCM devices, I have developed keen interest in semiconductor

device modeling and circuit simulations. I have communicated my key results in IEEE Transactions on Electron

Devices, in June-2014.

Academic Experience: E&CE, BMAS Engineering College, Agra [6/2009 – 6/2012]

Teaching experience in Digital Electronics and Analog Communication; supervised engineering undergraduates in

Basic Electronics Laboratory.

ADRDE DRDO Agra – Summer Intern [6/2007 – 7/2007]

Data recording in flash memory of microcontroller BL2120: DRDO-ADRDE (Aerial Delivery Research and Development

Establishment), Ministry of Defense, DRDO, Agra, India

EXTRA CURRICULAR ACTIVITIES

IIT Roorkee [2014]

First prize in roller coaster event, Civil Department

First prize in Spectrum event-Cognizance-2014, ECE Department.

GyanJyoti[2008]

Second prize in debate competition in GyanJyoti-2008, annual technical festival of Hindustan College of Science

and Technology-Farah, Mathura, India

HelpAge India [1999]

Worked for Help-Age India, an NGO working nationwide for the cause and care of elderly

Cerebrum, Annual Technical Fest at Anand Engineering College-Agra

Participated in Paper presentation during Cerebrum-2007, presented topic Quantum Cryptography

Organized Technical Committee in Cerebrum -2008, and Media Committee in Cerebrum -2006

PERSONAL DETAILS

Gender Female

Father’s Name Sh. Gulab Rai Jagtiani

Marital status Single

Address House no. 108, sector 11-B, Avas Vikas Colony, Sikandra, Agra- 282007

REFERENCES

Dr. Arnab Datta Dr. Anand Bulusu

Assistant Professor Associate Professor

Department of E&CE, IIT Roorkee Department of E&CE, IIT Roorkee

acgc6f@r.postjobfree.com acgc6f@r.postjobfree.com

+91-133*-******, +91-757******* +91-133*-******

[Shalini. Jagtiani]

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