CURRICULUM VITAE

NAVEEN MAGAM

S/o Purnachandrarao,

Anigandlapadu(po),

Penuganchiprolu(md),

Krishna district Email: acgbtp@r.postjobfree.com

Andhra pradesh. Mobile :( +91-986*******

Objective:

Seeking a technical position in the field of VLSI Engineering and helping to achieve organizational goals.

Experience and Expertise

VLSI professional with 3 years of experience.

Experience in IP level verification using HVL language such as Systemverilog with OVM methodology.

Experience in RTL Design using VHDL,Verilog.

Developed OVM Test bench environments for different modules.

Experience in Functional Verification using constraint random and coverage driven methodology.

Involvement in complete Functional verification life cycle from Specification study,Test plan Preparation and development of OVM Testbench Environment. Estimated Code and Functional Coverage.

Worked on protocols, such AMBA-AHB,SPI.

Worked on memories like DDR2SDRAM, SERIAL FLASH and SRAM.

Knowledge in systemverilog Assertioins.

Experience Summary

Currently Working as a Design and Verification Engineer-VLSI at MIC Electronics Limited from July 2011- Till date.

Educational Summary

B.Tech ( ECE) from JNTU,Hyderabad in 2008.

Intermediate from Krishnaveni Jr College,Kothagudem in 2004.

S.S.C (Board of Secondary Education) from APR School, Nimmakur in 2002.

PROJECTS HANDLED:

Project#1

Functional Verification of DDR2 controller with AHB interface

Methodology

OVM

Tools

Questa sim

Role

Involvement in OVM test bench environment and created tests

Place

MIC Electronics Limited.

Description

DDR2 controller is interface with AHB VIP for data bus and interface with simple AHB agent for register configuration.Functional verification is done by using constrained random and coverage driven methodology.Functional verification of Various operations involved in this project are bank and column selection, burst read/write, precharge.Verified the DDR2 controller running at 400MHz. Implemented Data monitors and checkers for coverage purpose.

Responsibilities

Developed verification components such as drivers, monitors and scoreboard in system verilog, OVM

Developed tests, sequences and virtual sequence in OVM

Worked on the detail documentation of the test reports and coverage reports.

Project#2

Functional Verification of SERIAL FLASH using SPI interface

Methodology

OVM

Tools

Questa sim

Role

Involvement in OVM test bench environment and created tests

Place

MIC Electronics Limited.

Description

Functional Verification of SPI SERIAL FLASH using SPI interface is developed using constrained random and coverage driven methodology. Functional verification of various operations involved in this project are slave selection,Mode selection, read/write, erase. verified the SPI Serial Flash running at 70 MHz. Implemented Data monitors and checkers for coverage purpose.

Responsibilities

Developed verification components such as drivers, monitors and scoreboard in system verilog, OVM

Developed Tests and sequences in OVM

Worked on the detail documentation of the test reports and coverage reports.

Project#3

Video Display Interface Card (VDIC)

Tools

Quartus –II, Altera FPGA Cyclone-IV.

Role

Developed VHDL code and Testing.

Place

MIC Electronics Limited.

Description

VDIC can display the picture or video on the LED Display board. The data received from DVI interface is digitized using AD9887 into RGB signals of 24 bit along data. The data received is stored in DDR2SDRAM and processed in FPGA. FPGA receives look up table data from Micro-controller, which will affect the brightness and contrast of the picture. The data is sent to Display Board through the Serializer Ports.The main application of this Control card is to display Video and Live data.

Responsibilities

Development of Microcontroller block and DDR2SDRAM block in VHDL.

Coding and extensively participating in the development of designing and Verification.

Debugging using Oscilloscope.

Skill Set Summary

Simulation : Questa sim,VCS.

HDL Languages : VHDL,verilog

HVL Languages : Systemverilog

TB Methodolgy : OVM

Personal Details:

Father’s Name : M.Purnachandra Rao

Date of Birth : 20-07-1986

Religion : Hindu

Languages Known : Telugu, English

Nationality : Indian

Passport No : G2847164

Declaration:

I hereby declare that the information furnished above is complete and true to the best of my knowledge.

(NAVEEN MAGAM)

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