KOMAL

Current Location: Delhi(NCR)

Tel: +_******4801

Email: acgaw5@r.postjobfree.com

Objective

Wish to serve an Organization in VLSI Domain that utilizes team-work effort for Research, Learning and

Development, and provides me ample opportunities to grow and contribute to the better world by creating value

together with a vision for the future.

Educational Qualification

Qualification Year University/Board Percentage/ Grades

M.Tech Pursuing ITM university, Gurgaon (Haryana) India 7.92 / 10

(VLSI Design)

B.Tech Kurukshetra University, Kurukshetra 63%

(ECE) (Haryana) India

2012

High School Central Board Of Secondary Education 66%

2008 (CBSE), New Delhi, India

Matriculation Central Board Of Secondary Education 61%

2006 (CBSE), New Delhi, India

Technical Skills

Sequential Languages

Basics of C, C++ and Graphics

Hardware Description Language(HDL)

VerilogHDL

Verification Language(HVL)

SystemVerilog

Operating Systems

Windows XP/Vista/7/8, Red Hat Enterprise Linux v5.4 & v6.3

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Scripting languages

Shell, Perl/TK

Tools & Technologies

Cadence Virtuoso, SoC Encounter, NC-SIM, RTL Compiler, Xilinx ISE & System Ed, Tanner (L-Edit, S-

Edit, LT-Spice), TCAD, Mentor Graphics (Questa Sim)

Software Packages and Utilities

MS Office, Management Scientist, Pert Chart Expert

Projects

Line Follower Robot

This simple robot is designed to be able to follow a black line on the ground without getting off the line too much.

The robot has two sensors installed Underneath the front part of the body, and two DC motors drive wheels

moving forward.

A circuit inside takes an input signal from two sensors and controls the speed of wheels’ rotation. The control is

done in such a way that when a sensor senses a black line, the motor slows down or even stops. Then the

difference of rotation speed makes it possible to make turns. For instance, in the figure on the right, if the sensor

somehow senses a black line, the wheel on that side slows down and the robot will make a right turn.

Implementation of 32-Bit ALU on SoC Encounter for GDSII Extraction

Arithmetic Logic Unit (ALU) is a fundamental building block of the Central Processing Unit (CPU) of a

computer. Even one of the simplest microprocessor contains one ALU for purposes such as maintaining timers.

The 32-bit ALU built by cascading adder of 32 bit, subtractor of 32 bit, multiplier of 16 bit and mux of 32 bit for

performing the basic addition, subtraction and multiplication. Process includes Simulation of ALU done by

XILINX, and NC-SIM, after that we have done synthesis of the design in RTL Complier from which we extract

the gate level netlist and SDC file, and some parameters are calculated, and then provide the gate level netlist and

SDC files to the soc encounter for GDSII extraction.

Layout of a CMOS Inverter using Cadence Virtuoso Layout Tool and then Simulate it to Check

DRC & LVS Results

Functional Verification of Programmable Interval Timer Core using SystemVerilog

Programmable interval timer (PIT) is a simple timer that generates an output periodic signal for a

microcontroller when it reaches a programmed count. It includes creation of a constraint-random

verification environment for programmable interval timer using a transaction-based approach. It is a

hierarchal environment which is very easy to be built and maintained. The overall functional and

assertion coverage achieved is 97%. If code coverage is included then overall coverage reported is 80%.

Training & Internships

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Organisation: Xinoe, Sec 18, Gurgaon

Course: SystemVerilog

Duration: June-July 2014

Organisation: CDAC, Mohali

Course: Networking

Duration: June-July 2012

Organisation: Jindal Industries

Duration: June-July 2011

Publications

Komal, Neeraj Kumar Shukla, “A Survey on the Algorithmic Approach Used in Routing for Placement

and Routing Flow”, International Journal of Engineering Science and Technology-IJEST, Vol. 6, Issue. 6,

June. 2014, Pp. 339-358, ISSN: 0975-5462.

Seminars & Workshop

Attended Special Skills Development Program in Project Management for M.Tech VLSI Design at ITM

University, Gurgaon

One day Workshop on SoC Encounter – Design Flow” by Cadence Design System at ITM University,

Gurgaon

One day Seminar on Introduction to VLSI Design by ST Microelectronics, Noida.

One day Workshop on FPFA” for Faculty and Students of ITM University, Gurgaon.

Attended Special Skills Development Program in linux and Shell Scripting by Fostering Linux.

Attended National Workshop on “Recent Trends in Engineering and Network Security” held at N.C.

Institute Of Technology, Israna, Panipat

Area of Interests

Physical Design

EDA Tool Designing

Digital VLSI Design

RTL Design and Verification

Awards & Recognitions

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Certification from Fostering Linux(Gurgaon) for Successfully Completing Training on LINUX

and Scripting

Awarded with Certificate in College Fest for Getting 3rd Position in Seminar

Awarded with Certificate in SDITM Fest for Getting 1st Position in Electro Quiz by EMTECH Foundation

Certification from Robosapiens Technologies Pvt for Participated in Zonal Rounds of Robotryst-

2012 A National Level Robotics Championship.

Certification from Alpha Technology for Successfully Completing Course in Programming

Language ‘C’ with S Grade (85%)

Personal Traits

Confident and Persuasive Team Builder

Goal Focused

Positive Thinker

Honest Hardworking

Reference

Dr.Neeraj Kr. Shukla

Associate Professor-Department of EECE

Project Manager-VLSI Design

ITM University, HUDA Sector-23A,

Gurgaon-122017 (Haryana) India

E-mail: acgaw5@r.postjobfree.com

Contact: +91-921*******

Rakhi Nangia

VLSI Design Lead

Xinoe Systems, Plot No.38

Sec-18, Gurgaon (Haryana)

E-mail: acgaw5@r.postjobfree.com

Contact: +91-991*******

Personal Details

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Father’s Name Mr. Uttam Singh

30th October, 1990

Date Of Birth

Sex Female

Language Known English, Hindi

Martial Status Single

Nationality Indian

Address 240, Urban Estate IInd Hisar, Haryana 125005

Declaration

I hereby declare that the information furnished here up to my knowledge and belief.

Place: Delhi(NCR)

Date: 01/09/14 Komal

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