Thomas J. Davidson

https://www.linkedin.com/in/tomjdavidson

acg3zr@r.postjobfree.com

Mobile 512-***-****

Principle Systems Engineer

Dell Computer Inc - Data Center Solutions 9/12 - 9/13

Hyperscale Server Integration testing at factory. Design rack level server power distribution,networking.

Manage joint developement lab for major customer. Developed lab physical and network security policy.

Specified infractructure and coordinated new lab equipment and power installation

Fault Isolate and Resolve system issues at customer datacenters

Senior Systems Engineer

Dell Computer Inc - Enterprise Modular Servers 11/06 - 9/12

Test Plans for Blade Server Chassis Controller, Bring up, Unit, System Tests .

Integration of Equalogic Storage array with Modular Chassis, hardware integration with chassis, software

integration with Chassis Management Controller, thermal and power managment.

DDR3 and Intel QPI bus margining and layout refinement to improve memory and CPU bit error rate on

blade servers

Responsible for Modular Chassis Management Controller, Bring up, Prodcut Test Plans, troubleshooting

issues, coordination with Server and chassis module teams

Wrote Specifications for blade server hardware interface to modular chassis

Senior Staff Circuit Designer

North Shore Circuit Design 5/98-11/06

Circuit design, systems design & development. FPGA design. Board-level design. Test development and

test analysis services for integrated circuits and systems. Development of embedded software (assembly

and C). Created PowerPC750-based content-addressable memory system on PCI for Windows-NT PCs.

Designed PCI based PowerPC image co-processor and several G3/G4 PowerPC CPU cards along with

single and multi-phase switching power supplies. Responsible for all phases of projects including

preparing bids, managing external vendors and contractors, design review, customer delivery and post

delivery follow-ups.

Staff Applications Engineer

Motorola Inc., PowerPC Applications Engineering 11/1996-present

Developed a standard method for describing and distributing JTAG scan sequences for accessing PowerPC

internal registers for use by third party emulator tool vendors. Wrote firmware for MPC860 based JTAG

controller using Metaware compiler and SDS Single Step tools. Debug PowerPC customer systems using

HP 16500 logic analyzer, HP PCI exerciser, HP Processor probe. Implemented Applications lab VxWorks

Development environment under WinNT4 for PowerPC BSP project.

Staff Test Engineer

Motorola Inc., PowerPC Test Engineering 1/95-11/96

Member of the PowerPC 604 yield-improvement task force. Developed new probe test program for the

J971 test system to allow for engineering data collection without impacting production test yields.

Developed new test template code for the J971 test system. Specified the design of new J971 test hardware

for the PowerPC 604 final test.

Senior Product Engineer

Motorola Inc., 88K RISC Microprocessor Design 5/90-1/95

Responsible for development of the J953/J971 ATE test program and design of test fixtures for the 88110

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superscalar RISC processor. Performed characterization of AC and DC electrical specifications. Analysis of

circuit faults using logic analyzers and the Schlumberger IDS5000 scanning electron beam microprober.

Used Micrion focused-ion beam system to modify 88110 prototypes for evaluation of proposed circuit

changes. Performed statistical analysis of Final Test results to determine cause of defects. Developed and

implemented qualification plan for MC88110 product. Wrote PERL and C-shell scripts to generate test

vectors from simulator output. Developed tools to manage multiple test programs for a product mix of

different mask sets and packages for use by 88110 product engineers.

Component Test Engineer

Texas Instruments Inc., Component Test Facility, Defense Systems & Electronics Group 1/85-4/90

Supervised 2 engineers on development of AC tester for Emitter-Coupled Logic. Responsible for testing of

CMOS, TTL, ECL Digital Integrated Circuits. Tested devices for compliance to DOD-883-C DC and AC

Specifications using Automatic Test Equipment. Designed printed circuit boards for use as test fixtures.

Developed software test programs for the Sentry 21 ATE. Supervisor of tool room technicians and

assemblers in support of ATE test floor.

Education: Bachelor of Science in Electrical Engineering, University of Tulsa, 1984.

Other Information:

Owner/Administrator Hyperweb Dot Com, an Internet-presence provider. Internet, LAN & ISDN

administration in a Windows 2000 and Linux environment. C, PERL, and Visual BASIC programming.

Board of Directors, Austin Robot Group, presently developing video tele-presence system using 1.2 GHz

video and Wi-Fi 2.4Ghz technology. Private pilot. Amateur radio (KB5VIM).

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