CHINNATHAMBI UDAY SOUNDAR RAJ

**-***,*********,

Dharmavaram, E-mail:

acfu45@r.postjobfree.com

Anantapur-515672, Mobile:

+918*********

Andhra pradesh.

Objective

Seeking an entry level position in an organization where my

abilities are put to work. And want to become one of the biggest assets of

the organization.

Educational Profile

Qualificatio Year Institution Board/ Percentage

n University

M.Tech(VLSI) 2013-2015 JNTU (SEER Akademi) JNTU_A 86.20

B.E(ECE) 2008-2012 Vel Tech High Tech Dr. RR ANNA 7.92*

Dr.SR Engg. College, UNIVERSITY

Chennai.

INTERMEDIATE 2006-2008 Sri sangameshwara STATE BOARD 90.6

Jr.college, Dharamavaram.

S.S.C. 2005-2006 Priyadarsini STATE BOARD 82.3

vidyamandir,Dharmavaram.

*CGPA (out of 10)

Software Exposure

Languages : Verilog,Basic concepts in PERL,C

Simulator Tools : VCS simulator, H-Spice

Synthesis Tools : Design compiler

Operating Systems : Windows, LINUX

INDUSTRIAL EXPOSURE:

. Undergone in-plant training at KELTRON COMMUNICATION COMPLEX,

Trivandrum in June 2010.

. Undergone a 5days training program at ATI HYDERABAD, based on

microprocessors and digital electronics.

. Industrial visit to DOORDHARSHAN KENDRA (Chennai).

ACADEMIC PROJECTS:

M.TECH PROJECTS:

> Designed and written the Verilog code for Finite State Machines

like Sequence Detectors, verified its functionality in Synopsys

VCS and generated various coverage reports.

> Designed and written the Verilog code for FIFO, Verified its

functionality in Synopsys VCS and generated various coverage

reports.

> Designed and written the Verilog code for all types of Shift

Registers, Verified their functionality in Synopsys VCS and

generated various coverage reports.

> Designed and written the Verilog code for memories, Verified

their functionality in Synopsys VCS and generated various

coverage reports.

> Performed synthesis for the above designs using Synopsys Design

Compiler with 32nm and 90nm technology.

> Reduced dynamic power for the above designs with the help of

Clock Gating, SIAF file concepts in synthesis.

> Written a HSPICE code for various CMOS logic circuits like All

gates, Inverter, Current mirror, Multiplexer etc and performed

simulation using Synopsys HSPICE tool

B.E. PROJECT TITLE- "AUTOMATED POWER CONTROL FOR MOBILE LASER SPECKLE

IMAGING SYSTEM

SUBJECT - To control power consumption of medical equipment that is

mainly used in hospitals and labs. And also to make that equipment

used as mobile device.

PROJECT BRIEF - LASER speckle imaging system is mainly used for

finding blood perfusion and clots in human skin. For controlling the

power we are using OPB 704 sensor to find out the area that has to be

tested. Then automatically the laser and camera will be switched on

for that instant only, So that we can avoid continuous power supply to

laser and camera.

CO-CURRICULAR ACTIVITIES:

. Participated in the international workshop on VLSI, in association

with IUCEE.

. Participated in project expo of ASTHRA'10.

EXTRA CURRICULAR ACTIVITIES

. Was an active member of E-cell.

. Played football match for my school at zonal level.

. Winners in quiz competition at mandala level.

SKILLS

. I am a Good team player who is capable of contributing to the

organization.

. Optimistic in approach and adapting to situations.

PERSONAL PROFILE

Name : Chinnathambi uday soundar raj

Father's Name : Chinnathambi selvaraju

Age & Date of Birth : 23, 04-06-1991

Sex : Male

Marital Status : Single

Nationality : Indian

Hobbies : Cooking, Enjoying the nature.

Languages Know : Telugu, English, Tamil and Hindi

Place : ANANTAPUR

AUTHENTICALLY Date :

(C UDAY SOUNDAR RAJ)

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