CURRICULUM VITAE

RAGHU L

Email-id: acfsps@r.postjobfree.com

Contact No: +91-812*******

OBJECTIVE

To work in an organization that offers opportunities for

professional and intellectual advancement, utilizing my technical

skills.

EDUCATION QUALIFICATION

Qualification Institution & University Year of Percentage

passing

M tech New Horizon College Of Engineering, 2014 70%

(VLSI & embedded Bangalore.

systems) (VTU)

B.E.(Electronics Bala Gangadharanatha Swamiji 2011 70%

and Institute of Technology, Mandya.

communication) (Visvesvaraya Technological

University, Belgaum)

P.U.C. Seshadripuram composite PU College, 2007 55%

Yelahanka. (Karnataka State

Pre-University Board)

S.S.L.C. Maya English High School, Vijayapura. 2005 78%

(Karnataka State Secondary Education

Board)

COMPUTER SKILLS

Programming Tools: Cadence (VLSI).

Operating Systems: Windows, Linux.

Languages Programming: - Verilog, Microcontroller, C Language, C++, Perl

Scripting.

ACADEMIC PROJECT

Automatic Railway Gate control

The project is designed using 8051 Microcontroller. One group of

transmitters and receivers is fixed at upside and down side of the train

direction. When upside receiver get activated the gate motor runs and the

gate is closed and stays closed until the train crosses the gate and reach

the down side. The buzzer will immediately sound when receiver is activated

and the gate will close after 5 seconds and stop the sound after train is

passed. The open and close control for the gate is transmitted from sensors

using wireless digital modulation.

Design of 16x16 bits Multi-precision multiplier

A novel approach to multiprecision multiplication, which is low power

and low area, with different functionalities and characteristics.

Multiprecision works depending upon inputs you applied that may be 8x8 or

8x16 or 16x8 or 16x16 bits etc, multiplier consisting of these in single

unit. Here the methodology is 'reuse' of sub blocks of MP multiplier and

by using pass transistor logic, number of transistor count is reduced and

unused blocks are disabled. So, area and power is reduced by inputs applied

to MP multiplier. The coding for this project is written in the Verilog

HDL.

Platform used: Cadence.

PERSONAL SKILLS

< Determined, High Energies, Enthusiasm to explore.

< Keen interest to learn and become valuable to the organization.

< Good decision making and analytical skills.

PERSONAL DETAILS

Name : Raghu L

Father's Name : Lakshman C M

Date of birth : 08-10-1989

Nationality : Indian

Languages Known : English & Kannada.

Permanent Address : Cheemachanahalli, Devanahalli Taluk, Bengaluru

rural district-562135

Karnataka.

DECLARATION

I hereby declare that the above information furnished is true to the best

of my knowledge and belief.

Place : Bangalore

Date :

SIGNATURE

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