MURALI PRAVEEN V

Tirupathi

Date of Birth: June *3, 1985

Mobile No.: +91-944******* Email Id: acf8j0@r.postjobfree.com

OBJECTIVE:

Seeking for a position in an organization where I can use my abilities and skills in providing the students

with the best techniques, in order to get best out of them.

PROFESSIONAL SYNOPSIS:

• 2 years 9 months of Experience in Teaching.

• Ratified as Assistant Professor from JNTUA, ANANTAPUR.

• Various Research Papers Published/ Participated in various International and National conferences

and attended various workshops/FDPs.

• Excellent communication and written skills

• Profound knowledge of the subject areas and ability to teach students by using various methods

• Highly skilled in collecting the study material and chunking it in a proper way

• Strong commitment with the job as well as interested in teaching PG and UG students

• Meticulously managed operations and maintenance of laboratory equipments, strategic planning, supply chain

administration and human resource development

• Ensured NBA, NAAC and AICTE accreditations of institution through constant monitoring and effective

maintenance of documents and records

• Ability to handle the class in absence of the lead professor as well as an ability to motivate

students for better learning.

ACADEMIC CREDENTIALS:

Doctorate Post-Graduation Under Graduation

Education Level Pursuing Ph.D Master's Degree Bachelor's Degree

B.Tech in Electronics &

Course Low Power VLSI M.Tech in VLSI DESIGN

Communication Engg

Veltech Technical Bit Engineering College,

University SVPCET, Puttur

University., Chennai Hindupur

Year 2011 2006

Written Pre-Ph.D

Exam in Aug, 2014

Percentage/Status 67.42% 57.42%

Location Chennai, India Puttur, India Hindupur, INDIA

WORK PROFILE:

Worked as Assistant Professor in Chadalawada Ramanmma Engg College, Tirupathi from

•

December 2011 to August 2014.

Worked as Junior Lecturer in Sri Chaitanya Junior College, Tirupathi from Dec 2006 to Feb

•

2009.

PUBLICATIONS/CONFERENCES/WORKSHOPS:

1. INTERNATIONAL PUBLICATIONS: 02

V.MURALI PRAVEEN, A.SAISUDHEER, C.LEELAMOHAN paper titled “Reduced Clock

I.

Power Wastage by Using Conditional Pulse Enhancement Scheme”. Volume 04, Article

06113;, July 2013, ISSN: 2249 6556, http://ijves.com, page no: 497

V.MURALI PRAVEEN, V.SANKARAIAH, paper titled “ Single Side Buffered Router for On

II.

Chip Networks ”, volume 3, issue 5, May 2013, ISSN:2250:2439,

http://sites.google.com/site/ijcesjounal, page no: 7

2. CONFERENCES:

2.1 INTERNATIONAL: 03

V.MURALI PRAVEEN, P.NAGA RAJU, Dr V.THRIMURTHULU Paper Titled, “ Power Safe Test

I.

Pattern Refinement for Transition Fault coverage for at speed Scan based testing”. ICIEEE’ 2014,

ISBN: 978-**-*****-** 8.

V.MURALI PRAVEEN, A.SAI SUDHEER, Paper Titled, “ Reducing clock power wastage by using

II.

conditional pulse enhancement scheme”. 2nd International Conference on COMMUNICATION AND

SIGNAL PROCESSING, ICCSP’2013 APRIL’2013.

V.MURALI PRAVEEN, V.SUKESH, Paper Titled, “Design of Low Power, High Speed Error

III.

Tolerant Adder”. 4th International Conference on “Science, Engineering and Technology

(SET)”,MAY ’2012.

2.2 NATIONAL: 03

V.MURALI PRAVEEN, V.SANKARAIAH Paper Titled, “Efficient Parallel Carry free Arithmetic

I.

Addition”. National Conference on Emerging Trends in Electronics & Communication Technologies,

NCECT’12,MARCH ‘2012.

V.MURALI PRAVEEN, V.LOKESH Paper Titled, “HK Means of Clustering on MRI Images to

II.

locate Brain Tumors”. National Conference on VAAGTARANG 2K11,August ‘2011.

V.MURALI PRAVEEN, G.SUNIL Paper Titled, “ Improved Area Efficient Weighted Modulo 2n+1

III.

Adder”. National Conference on PRAGNA 2K11,January ‘2011.

3. WORKSHOPS:

Participated in a two week ISTE WORKSHOP on “SIGNALS & SYSTEMS”, JANUARY ‘2014

I.

conducted by INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR.

Participated in a two week ISTE WORKSHOP on “ANALOG ELECTRONICS”, JUNE ‘2013 conducted

II.

by INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR.

Participated in a INTERNATIONAL WORKSHOP on “ROLE OF MATERIAL SCIENCE IN

III.

ENGINEERING AND MEDICINE ”, OCTOBER ‘2013 conducted by KRISHNA THEJA

TECHNICAL CAMPUS, TIRUPATHI.

Participated in a WORKSHOP on “SYSTEM DESIGN USING XILINX FPGA’s”, JULY ‘2013

IV.

conducted by VIGNAN UNIVERSITY, GUNTUR.

Participated in a NATIONAL WORKSHOP on “RESEARCH OPPURTUNITIES IN MICRO/NANO

V.

SYSTEMS”, MARCH ‘2013 conducted by KL UNIVERSITY, GUNTUR.

Participated in a INTERNATIONAL SEMINAR on “ADVANCED MODELING OF INDUSTRIAL

VI.

PROCESSES AND OPTIMAL CONTROL ”, MARCH ‘2013 conducted by SREE VIDYANIKETHAN

ENGINEERING COLLEGE, TIRUPATHI under TECHNICAL EDUCATION QUALITY

IMPROVEMENT PROGRAMME(TEQIP II).

Participated in a 5 DAY IUCEE INTERNATIONAL WORKSHOP on “ADVANCED TRENDS IN VLSI

VII.

”, JULY ‘2012 conducted by CHADALAWADA RAMANAMMA ENGINEERING COLLEGE,

TIRUPATHI.

Participated in FACULTY DEVELOPMENT PROGRAMME on “EMBEDDED SYSTEMS & SIGNAL

VIII.

PROCESSING” AUGUST ‘2011.

REFERENCE:

Mr. G. RAJESH Associate Professor

Dept. Of Electronics & Communication Engineering

Chadalawada Ramanamma Engineering College, Tirupathi

Mobile No.: +91-850*******

Email Id: acf8j0@r.postjobfree.com

Relationship: SUPERIOR

PERMANENT ADDRESS:

5 19,

LINGESHWAR NAGAR,

TIRUPATHI 517501

I hereby declare that information is true.

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