RESUME
B.JAYACHANDRA Email :
acepbl@r.postjobfree.com
Cell : +918*********
CAREER OBJECTIVE :
Seeking a challenging position in the field of PCB Design where my
skills and experience will greatly enhance the company's success and my
personal growth.
CAREER SUMMERY :
. Having 3 months of experience in designing Single sided, double sided
and Multilayer PCB's (Printed Circuit Boards).
. PCB Design Engineer Trainee at GRID India IT Innovations since April
2014.
EDA TOOLS SKILLS :
. PCB Schematic Design Tools : Cadence OrCAD Capture
. PCB Layout Tools : Cadence-Allegro PCB Editor
. Gerber Tool : Gerber RS274X
INTERNSHIP :
GRID India IT Innovations, Bangalore as PCB Design Engineer Trainee.
Project : Stepper Motor Control using microcontroller AT89C51
Components used : AT89C51 Microcontroller, 7805 Regulator, Transistors,
Rectifier Diodes and several discrete parts.
. Board size -111.76 X 76.2 mm
. No of connections -108
Responsibility : Complete Design activities from capture, layout,
placement, routing to final Gerber file release.
Tools used : Cadence OrCAD capture v16.5, Cadence-Allegro PCB editor.
Project : Simple Traffic Light Controller
Components used : IC 555 Timers, IC 7805, relays (5V, Single-Changeover),
Rectifier Diodes (1N4011), Light Bulbs and several discrete parts.
. Board size -114.3 X 81.2 mm
. No of connections -85
Responsibility : Complete Design activities from capture, layout,
placement, routing to final Gerber file release.
Tools used : Cadence OrCAD capture v16.5, Cadence-Allegro PCB editor.
Project : Automatic Switching-on Emergency Light
Components used : IC LM308, IC NE555, MOSFETs, Transistors, Rectifier
Diodes, Relays and several discrete parts.
. Board size -83.82 X 66.04 mm
. No of connections -84
Responsibility : Complete Design activities from capture, layout,
placement, routing to final Gerber file release.
Tools used : Cadence OrCAD capture v16.5, Cadence-Allegro PCB editor.
TECHNICAL SKILLS :
. Experience in Schematic entry, Library creation, footprint creation,
layout design, component creation and NC/Gerber data creation.
. Ensuring Design Rule Check (DRC) and Design Validation Process (DVP).
. Good Knowledge in IPC/Mil Standards.
. Good understanding of Electrical & Electronics fundamentals and
functioning of circuits.
. Positive attitude to take up the initiative at work and learn new
technologies.
EDUCATIONAL PROFILE :
. B.Tech in Electrical and Electronics Engineering with an aggregate of
70% from Sri Venkateswara College of Engineering,Tirupati affiliated
by JNTUA, during the year 2013.
. Intermediate with 88.9% in M.P.C group from Board of Intermediate
Education, during the year 2009.
. S.S.C with 88% from Board of Secondary Education, A.P during the year
2007.
ACADEMIC PROJECT :
Project Title : High-Efficiency Voltage Regulator for Rural Networks
Tools used : MATLAB v7.8.0 (R2009a)
Description : In this project we presented a high-efficiency voltage
regulator, which combines robustness, low costs and easy maintenance
without power electronics components.
PERSONAL PROFILE :
Name : B. Jayachandra
Father's Name : B. Sreenivasulu
Mother's Name : B.Renuka Devi
Date of Birth : 18th July 1992
Sex : Male
Nationality : Indian.
Languages known : English,
Telugu.
DECLERATION :
I hereby declare that all the above information are true and
correct to best of my knowledge and belief.
Place:
Date:
(B. JAYACHANDRA)