CURRICULUM VITAE

SHAH ABHISHEK KAMLESHBHAI

G/* & F/5 Premjyot Tower,

Opp. A-ONE School,

Shubhash Chawk, Memnagar,

Ahmedabad – 380052

Home: 079-********

Mobile: +91-992*******

E-Mail: acem77@r.postjobfree.com

CARRIER OBJECTIVE

Seeking a challenging position that offers me generous opportunities to explore & outshine in the

field of VLSI Design & Verification while accomplishing personal as well as organizational goals

in such industry with excellent administrative aptitude and determination to carve successful

career.

EDUCATION

2012-2014 Gujarat Technological University, Ahmedabad 8.79 CGPA

M.E VLSI & Embedded System (Pursuing)

GTU PG School, Gandhinagar

2008-2012 Gujarat Technological University, Ahmedabad 8.31 CGPA

B.E Electronics And Communication

Gandhinagar Institute of Technology, Gandhinagar

SOFTWARE TOOLS

• NI-Labview, Labview RT, Labview FPGA, Communication protocols, NI Robotic module and

various Labview toolkit.

• C, MATLAB, Keil µ version, Verilog, System Verilog

• Synopsis Galaxy series Synthesis and physical design tools – DC-Compiler, C-Designer, IC-

Compiler(90nm lib), Gate level simulation – GLS (90nm lib)

• Xilinx, HSPICE, Minimos

HARDWARE TOOLS AND TECHNOLOGY

• FPGA Spartan 3E and PXI series

• 8051 and ARM 7 (LPC2138) microcontroller

• Knowledge of Field Instrumentation and Sensors and Industrial Communication Interfaces

EXPERIENCE

I have 1 year and 1 month Experience as in below Organization.

Name of Organization Duration Designation Reporting to

(Designation)

From To

Institute for Plasma Research 15/7/2013 15/7/2014 NFP – Intern Division Head

(M.E Project)

Microtech Infosystem 1/6/2012 15/7/2012 Assistant Project Head

Engineer

Specific contributions made by me in current and last position:

1. NFP-Intern (Institute for Plasma Research):

As NFP-Intern mainly inspired and concentrated on FPGA Labview compatibility and

industrial application for IPR remote handling robotics technology for TOKAMAK operation.

I have develop Labview and Sensor based intelligent robot with FPGA controller Spartan 3E

starter kit and PXI series of National Instruments. I have make interfacing of Haptic Data-

glove DG V V-hand with FPGA and their sensors mapping.

2. Assistant Engineer (Microtech Infosystem):

As Assistant Engineer I have worked 1 month as Assist the networking system for different

government body. Product management to system establishment work had been carried out.

ACADEMIC PROJECT

• Stroboscope (B.E Final Year)

• Development of FPGA based robotic system for remote operation using haptic device.(M.E

Thesis)

OTHER PROJECT

1. Development of SPI IC

• Verilog Front end programing of 1master 1 slave Serial peripheral interface chip coding, its

synthesis in synopsis DC-Compiler tool. Its Gate level simulation and after that physical

design in IC compiler. All work is in 90 nm library.

2. Development of 32MHz Digital clock with calendar IC

• Verilog Front End programing of IC its verification in VCS tools. Synthesis the code in DC-

Compiler and gate level simulation. Its physical design in IC compiler. All work in 90 nm

library.

3. Development structure of different OP-AMP with transistor in C-Designer

• Making of op-amp in C-Designer using transistor and checking its waveform and verify it.

4. Verification of AMBA-AHB bus

• Verification of AMBA-AHB bus in system Verilog

SKILL PROFILE

• Industrial Automation and Control Software Design & Development (GUI)

• System Integration and Installation, PC based Automation and NI Labview Real-Time

Programming

• Industrial Communications: PXI, Ethernet, RS232, USB, Wireless Zig-bee

• Verilog Front-end Programing and Back-end Scripting in Synthesis, Compiler and Designer

Synopsis tools and Simulation in VCS and verification

PAPER PUBLICATION

• Nishtha Vyas, Abhishek Shah, “A Review on FPGA based Pulse Processing System”,

International Journal of Advance Research in Computer Science and Software Engineering

(IJARCSSE),ISSN: 2277 128X, Volume 4, Issue-1, January 2014

REFFERENCES

• Mr. Haresh Patel • Mr. Hardik Bhatt

Project Engineer Head of Department

Institute For Plasma Research Gandhinagar Institute of Technology

Mobile: +91-940******* Mobile: +91-982*******

E-mail: acem77@r.postjobfree.com E-mail: acem77@r.postjobfree.com

Relation: Project head Relation: Professor

PERSONAL DETAIL

Name : Shah Abhishek Kamleshbhai

Religion : Hindu (Jain)

Date of Birth : 08/09/1990

Sex : Male

Marital Status : Single

Language Known : Hindi, English, Gujarati

Interest : Music, Photography, Travelling

DECLARATION

I hereby declare that the above-mentioned information is true to the best of my knowledge

and belief. I have not suppressed any material fact or factual information in the above statement.

In case I have given wrong information or suppressed any material fact or factual information,

then my services are liable to be terminated without giving any notice or reason thereof.

NAME : Shah Abhishek

PLACE : Ahmedabad

DATE : 29/5/2014

Yours Sincerely

hek

Abhis

Abhishek K Shah

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