MAULIK PATEL, PMP, CC

* San Jose, CA * 650-***-**** * aceh76@r.postjobfree.com *

www.linkedin.com/in/patelmaulik/

Program Manager

Highlights:

. Over 13 years of experience in both large and start-up companies of which

9+ yrs increasingly responsibilities in managing resources, customer

engagements, project management & product marketing

. Led award winning, multi-purpose, multi-user, highly scalable HW/SW

verification acceleration/emulation systems and enabling products

. Strong skills in verbal and written communication; specialized in

positioning, messaging, creating relevant presentation, creating

collateral and enabling sales/distribution by providing training and

strategy

. Drove sustainable differentiation through offering enabling products,

executed global product launch of new products and drove marketing

campaigns

. Developed and marketed connectivity IP such as Xilinx Aurora, DisplayPort

and PHY-Layer (MIPI D-PHY, M-PHY)

. Negotiated win-win contracts, established new partnership and managed

customers and vendors

Professional Experience:

ARASAN CHIP SYSTEMS, 8/2013 - Present

Strategic Account Program Manager

. Customer "contact window" (close liaison) for strategic accounts

(external projects)

o Drove and managed internal & external projects and programs from scope

definition to closure

o Plan and executed multiple meetings, content reviews and collaboration

strategies (working with global cultures)

o Facilitated PHY IP delivery and integration in customer SoC

. Influenced IP development processes and design flows for advanced

mixed-signal integrated circuits

o Interfaced with engineering for Digital, Analog, Layout, Physical,

Verification, Validation, Characterization and IP Qualification

activities

o Held project internal/external communication meetings for cross-

regional, cross-functional alignment and Project Improvement Team

(PIT) meetings

. Led productivity and quality improvement initiatives (internal

projects)

o Removed team's impediments at multiple-levels

. Enabled by getting right tools, budget approval, met cost reductions

objectives, collaboration/alignment, technical and non-technical

trainings

o Designed and led development rollout effort for customer case

ticketing system (NetSuite CRM interface), enable consistent use of

bug tracking (Bugzilla) and drove consistent use of revision control

(GIT)

o Coached engineers discipline base approach (planned based WBS,

scheduling activities over Ad-hoc development, ID key risks,

management, mitigation steps) - PMP way to predictable success

XILINX, 7/2011 - 8/2012

Product Marketing Manager

. Led connectivity (IP) SW products Aurora, DisplayPort TX, RX and

Gigabit-Transceiver wizards [high-speed serial interface SERDES

settings]

. Defined business opportunity (TAM/SAM), goals and strategy

o Prioritized and managed field/customer requests, feature improvements

through organizing and leading regular Product Review Team with key

stakeholders

o Updated positioning as required, prepared proposals with business

analysis and recommended options to upper management

o Prioritized and gained alignment among cross-functional teams with

conflicting needs for over 50 protocol templates (achieved 2X

additional support)

o Increased product usage by executing strategy and won major account

over $100M life-time-revenue contract against competition

. Participated in Standards Body

o Assumed primary contact for VESA standard body, participated and

represented Xilinx position and requirements in coordination with

engineering team to propose changes

o Formulated new strategies, prioritization to support new features

. Outbound Marketing

o Managed outbound events and became go-to person for all my products,

and offered sales which market segments, companies and customer roles

should be targeted

o Partnership and channel enablement

. Coordinated and participated in promotional activities and

trade shows, working with partners for DisplayPort IP.

. Grew opportunity funnel from 5 to 45 prospects in 6 months going from

$4M to $58M revenue through DP v1.2 IP delivery, training reps,

field/channel presentations, sales-, technical-FAQ, coaching,

application notes, etc.

. Refreshed collateral

. Roadmap, sales training, product datasheet, user guide, webpage,

customer presentations,

. Prepared demos and promoted benefits and new capabilities

o Delivered Aurora Press Release with Nexus forum IEEE-ISTO 5001-2012

for promotion

CADENCE DESIGN SYSTEMS, 4/2005 -2/2011

Technical Marketing Manager, Product Marketing Manager

. Product Management

o Drove development of complex system-level products to solve EDA

Industry's Verification Acceleration, Power Efficiency and User

Productivity challenges

o HW: Multi-purpose, Multi-user, High-performance verification computing

servers/platforms

. Xtreme Series Systems [Xtreme III, Xtreme III Desktop]

. Palladium XP [XL, GXL] Verification computing platform [combined best

of Palladium and Xtreme Platforms into next generation systems]

. Palladium Series Systems (Palladium II, Palladium III, SpeedBridge

rate-adapters between [Xtreme and Palladium] emulation and real-world

interfaces such as Ethernet, PCI-Express, SAS, SATA, USB, etc.)

o SW: Simulators and Applications

. Simultaneously managed multiple software releases and migrations

. Integrated independently created software with hardware platform

. Product Marketing (co-managed products with combine revenue over

$150M)

o Collateral [sales kit with use case, datasheet, user guide,

configuration guide, Technical and Sales FAQ, Competitive Analysis,

Positioning, Pricing]

o Sales & field training content and delivery

o Managed go-to-market program and launch plans, scorecards of

engagements

o Recommended product mix such as pricing, packaging, positioning for

standard and custom configurations

o Helped with BOM release process for complex system, forecasted

number of system units required in inventory with their

configuration for the various purpose up to product launch to

ensure the proper inventory, sale and profitability of products

upon launch

o Handled product demonstration from planning, budgeting, standalone

creation as well as integration with partners, staging, scripting, and

scaling at events and trade shows, arranged logistics when necessary

. Successful global (US, EMEA, India, Japan) product launch awards

o Cadence Palladium Verification Computing Platform

o Cadence Palladium Dynamic Power Analysis (DPA)

o DPA received EDN 19th Annual Innovation Award in Design Analysis

category

. Directed Campaigns & Customer Engagements

o Content creation for seminar, webinar, tectorial, and customer

presentations

o Lead nurturing and tracking/reporting progress for New Logos, Upgrade,

Promotional, Technical Differentiation specific campaigns

VERISITY DESIGN, 10/2004 - 4/2005 (Verisity was acquired by Cadence)

Technical Marketing Engineer

. Prioritized product improvements

o Customer requests, market trends, benchmarks and scorecards against

competition

. Developed market-specific product strategies, created MRD, use case

characterization, and competitive SWOT analysis to define product

roadmap that helped deliver unique and differentiated values

. Led tiger team to address CID (Customer-in-distress) issues

. Planned product releases, field interlock trainings and collateral;

managed cross-functional processes, teams, campaigns, and internal

website

ALCATEL CORPORATION, 2/2004 - 9/2004

FPGA/ASIC Verification Engineer, (Consultant)

. Formulated a detailed module-level test plan, reusable and configurable

verification environments in Specman 'e' for Alcatel Litespan 7201

Multiservice Access Platform system and verified functionality

INTEL CORPORATION, 9/2001 - 9/2003

Hardware Validation Engineer (HW Design Engineer Title)

PCI-Express Advanced Server Chipset Validation

. Pre-silicon functional validation of PCI-Express 1.1a interface for high-

end (quad and dual processor) server chipsets in C++

. Validated PCI Express functionality in Transaction, Data link layer, Link

Training Status State Machine (LTSSM) shared responsibility for PHY layer

PCI-Express Test Chip Validation

. Developed test bench and validated PCI-X, PCI-Express interfaces with

functional plan

HEWLETT PACKARD, 2/2001 - 9/2001 (CSL group was acquired by Intel)

Design Engineer

. Investigated and recommended Supercomputer/Server's product features

. Researched various competitors' product features and presented feedback

to marketing and RTL team for developing next generation of chipset

products

Education:

Project Management Institute (PMI)

Certified Project Management Professional (PMP), 2013

San Jose State University, 2013

Certification in Project Management Training

. Agile Project Manager, Scrum Master and more

UNIVERSITY OF FLORIDA, 2000

Bachelor of Science in Computer Engineering

Other:

Xilinx Xpressionists Toastmaster, 2011 - present

Vice President of Education, 2012 - 2013

. Led club to achieve President's Distinguished status

. Completed Competent Communicator (CC) and led members to complete

their CC

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