Uma Bhavani Kodali

***** ******** ****,******** *****

Mobile: 858-***-****

Email:aceepu@r.postjobfree.com

OBJECTIVE:

I am looking for a challenging position in the field of wireless engineering and VLSI design.

EDUCATION:

● MS in Electrical Engineering,University of Missouri Kansas city(january 2013 to May 2014).

GPA 3.91/4

● B.Tech Honors in Electronics & Communications Engineering,GitamUniversity,Visakhapatnam

(july 2008 april 2012)GPA 8.66/10

IMMIGRATION STATUS: EAD Green card is in process

WORK EXPERIENCE:

Worked in Tata Group as engineer from June 2012 Dec 2012.My responsibilities include Investigating

and characterizing the performance of UMTS, HSPA and LTE networks in aspects ranging from RF

parameters to end to end data service capabilities and performance.Contributing to advanced topics

such as traffic modeling, capacity analysis,system verification, cell site planning, inter RAT optimization,

special event planning and heterogeneous networks.

INTERNSHIP:( ECIL, HYD may 2011 october 2011)

Design of digital CMOS logic to control the functionality of a variety of RF, analog and mixed signal

circuits such as RF front ends, Audio CODECs and Power Management circuits.My role in the team is

to write behavioral models of analog blocks, and Verification of chip level functionality (mainly

connectivity, programmability, power up/down, mode control, reset)Proficiency in using LabView for

NI PXI as ATE and also to perform RF measurements,Experience with advance bench test equipment

like network analyzers, oscilloscope, multimeters, power supplies,Experience in simulation and

board level design of analog & microwave circuits

PROJECTS SUCCESSFULLY COMPLETED:

a.)Physical layer Implementation of OFDM

This project deals with the MATLAB implementation of Orthogonal Frequency Division Multiplexing

technique for a simplified LTE system. In this we analyze the response by calculating the Bit Error Rate

for AWGN and other two different multipath channels. The performance of BPSK, QPSK and

16 QAM modulation techniques is simulated for different channel conditions. The spectral efficiency of

the OFDM technique is also studied under the effect of these channels.

b.)RF Propagation Path Gain and Bit Error Rate in Wireless Communications

In this project I’ve calculated the results using Okumura Hata model and estimated the propagation

path loss and the Bit error rate using matlab.

c.) Design of self bias TWO stage CMOS Amplifier

One of the basic problems of using CMOS op amps is they use a large number of external bias

voltages. I’ve designed a self biasing opamp to overcome the problem of more number of external bias

voltages.This self biasing can be done using constant gm circuit.I worked in CADENCE Virtuoso

environment to achieve accurate results.

d.)Design of a routing switch using Verilog HDL

A Routing Switch is a specialized switch that performs tasks of a router .It determines the best path to

the destination and forwards data packets to the next device along the path.Routers are mostly used in

big companies to separate local area networks(LAN) into subnetworks in order to balance traffic. I’ve

done the project using SynaptiCAD software. I wrote both the verilog code and also to test the written

code by using a testbench and obtain the resultant simulation results.

e.)Estimation of ionospheric properties using single frequency GPS receivers (Final Yr Project)

Ionospheric delay is one of the major error sources in various satellite navigation and positioning

Systems, the ionospheric delay has been considered the largest error source affecting GPS positioning

accuracy. For single frequency users, it is very important to effectively correct the ionospheric delay the

Klobuchar model, as part of broadcast GPS messages, is widely used to correct for ionospheric delay

in many real time GPS navigation or positioning applications. In this project data from IISC Bangalore

is used and processed using the MATLAB code to find the 3D position, Then a code for delay is

processed and the exact ionospheric delay is estimated.

f.)Remote control operations of multiple transceivers through E 1 radio interconnect

The objective of this project is to draw a scheme to control and Operate multiple V/UHF

Transceivers installed at various locations, geographically Separated about 1000 meters, through a radio

interconnect. The control & operating signals are framed into E1 for remotely controlling multiple

transceivers working in the frequency band 100MHz 400MHz.The Radio used is M7 RADIO.

g.)Delay Locked Loop (DLL) Design:

Developed a transistor level Delay Locked Loop design using CMOS technology on Cadence CAD

tool. DLL design consists of a phase frequency detector, a charge pump, a first order loop filter with

CMOS Op Amp (voltage follower), and voltage controlled delay line to create only a steady phase

error by avoiding phase error accumulation.

h.) Phase Locked Loop (PLL) Design:

Developed a transistor level Phase Locked Loop design using CMOS technology on LTspice CAD

tool. PLL design consists of Nand gates phase frequency detector, a charge pump, a loop filter, and a

voltage controlled oscillator combined with a level shifter, and an up counter for frequency division

(half adders & resetable D flip flops).

i.) Analog to Digital Converters (ADCs):

Developed a transistor level 6 bits HLC Flash ADC channel using CMOS technology on Cadence

Virtuoso 610 CAD tool. The design is to authenticate the High Speed Linear Comparing (HLC)

Methodology to improve the ADC channel linearity by considerably reducing Differential non Linearity

Mismatches (DNL), Integral non linearity, and Channel offset voltage. Knowledge of designing

High Speed (Pipeline, Subranging, M Channel) ADC Architectures.

j.)Digital to analog converters(DAC):

Designed a charge scaling capacitive DAC using common centroid approach in layout,In this two stage

amplifiers and D latch is designed and the corresponding DNL and INL are determined.I have

simulated using Cadence virtuoso.

DETAILS OF COURSE WORK :

Analog and Mixed Integrated circuit design,High speed Integrated circuit design,Wireless

communications, Mobile communication,Wireless networks, Linear integrated circuit

design,VLSI,Radars, Rf and microwave engineering, Digital signal processing,Computer Architecture

and Operating Systems,Computer Graphics,Computer Networks,Analog Electronic Circuits,Digital

Electronic Circuits,Digital communications, DBMS and web technologies.

DIGITAL DESIGN SKILLS:

Verilog HDL, OPNET software,Cadence(Layout design,schematic design), HFSS,MATLAB,

CERTIFICATIONS:

Ericsson wireless professional certification

HARDWARE SKILLS: NI PXI (ATE), NI PXI (RF analyzer), oscilloscope, power supplies,

signal generator, digital multimeters, network analyzers

COMPUTER SKILLS:

Programming skills in C, Java.

ACHIEVEMENTS:

● Awarded merit scholarship by government of A.P for being amongst the top 5% in the

intermediate board exams

● Awarded merit scholarship by Gitam University for being amongst the top 5% in Electronics

and Communications Engineering.

● Participated in the test conducted by THE UNITED SCHOOLS ORGANISATION(IT’S A

UNO INFORMATION TEST)

● Awarded ‘Appreciation certificate’ from IIT MADRAS for presenting a model of vibration

alarm in SHAASTRA 2009 competition.

REFERENCES

● Dr.Yang Yi, School of Computing and Engineering, University of Missouri,Kansas city

aceepu@r.postjobfree.com

● Dr.Beard,Cory, School of Computing and Engineering, University of Missouri,Kansas city

aceepu@r.postjobfree.com

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