Yang Liu

312-***-****

aceegc@r.postjobfree.com

**** *.****** ***, *****, Chicago

With a solid background in electrical and electronics engineering, Liu is building his strong skills in hardware

programming, signal processing, and embedded system and FPGA design through these tough projects.

Education:

Illinois Institute of Technology, Chicago GPA: 3.4/4.0 May 2014

M.S in Electrical Engineering, focus on signal processing

Tianjin University, Tianjin, China June 2011

B.S in Electrical Engineering,

Courses: Wireless Communication Systems, Digital Signal Processing, Digital Communications Principle,

Analysis of Random Signal, Digital System-on-Chip Design, Computer Networks, Discrete Time Systems

Experience:

Huawei Technologies, China(Intern) Test Engineer July 2011 – Sept. 2011

Cell phone hardware test: altitude test, vibration and friction test, high/low temperature test, and key test; cell

phone software test: programs stability test on the chip, board test, battery test, SD card test and simcard test.

Provided feedback and test report to design reviews

Automobile Cruise Control System Design Oct. 2013 – Nov. 2013

Implemented digital, sampled-data control, programmed and implemented system simulation with MATLAB

Achieved zero steady state error to step disturbance/step reference inputs

Kept settling time as small as possible (t = 8.7s), and overshoot to step changes lower than 6%

Made tradeoffs and chose the adequate throttles from three options

Ultrasonic Target Detection Design Based On FPGA Jan. 2013 – Mar. 2013

Designed with split-spectrum processing theory, improved the target-to-clutter ratio by an average of 40 dB.

Signal decomposition, designed 20 or more sub-band filters(Gaussian filters) based on the transducer spectrum

Put decomposed signals through different post processors (minimum/average/polarity/geometric mean/neural

network post processors), and compared results. Easily to detect the target echo.

Bowling Score Keeper System Design Sept. 2012 – Oct. 2012

Designed a bowling score keeper on a chip with given rules

Used a 10-bit score register and kept the score in BCD form. The lower two decimal digits of the registers were

displayed using two 7-segment LED indicators, and the upper 2bits were connected to two single LEDs.

Used a 4-bit BCD counter module for the middle BCD digit.

Programmed with VHDL code and Xilinx suite was used for the modulation and simulation.

Electronic Organ Design Oct. 2010 – Nov. 2010

Implemented an electronic organ system design on an Altera DE2 board, programed with Verilog, and used

Quartus ii to do the modulation and simulation.

Split one clock frequency to generate sounds with different frequencies. Used a keyboard as the input and stored

two songs in the board in advance.

Skills:

Experience with signal processing design, digital system modulation and simulation, familiar with Quartus ii,

Xilinx ISE and Cadence Allegro. Strong skills with Windows operational system and MS office.

Languages: C, C++, MATLAB, VHDL, Verilog, Python

Contact this candidate